IBM DTTA-351010 Hard Drive Specifications - Page 114

Minimum Multiword DMA Transfer Cycle Time Per Word

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Word 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 Content Description xF00H Capabilities, bit assignments: 15 14(=0) Reserved 13 Standby timer (=1) values as specified in ATA standard are supported (=0) values are vendor specific 12(=0) Reserved 11(=1) IORDY Supported 10(=1) IORDY can be disabled 9(=1) Reserved 8(=1) Reserved * 7 0(=0) Reserved 400xH Capabilities, bit assignments: 15 14(=01) Word 50 is valid 13 1(=0) Reserved 0 Minimum value of Standby timer (=0) less than 5 minutes (=1) equal to or greater than 5 minutes 0200H PIO data transfer cycle timing mode 0200H * DMA data transfer cycle timing mode Refer Word 62 and 63 0007H Validity flag of the word 15 3(=0) Reserved 2(=1) 1=Word 88 are Valid 1(=1) 1=Word 64 70 are Valid 0(=1) 1=Word 54 58 are Valid xxxxH Number of current cylinders xxxxH Number of current heads xxxxH Number of current sectors per track xxxxH Current capacity in sectors Word 57 specifies the low word of the capacity 0xxxH Current Multiple setting. bit assignments 15 9(=0) Reserved 8 1= Multiple Sector Setting is Valid 70 xxh = Current setting for number of sectors xxxxH Total Number of User Addressable Sectors Word 60 specifies the low word of the number xx07H * Single Word DMA Transfer Capability 15 8 Single word DMA transfer mode active 7 0(=7) Single word DMA transfer modes supported (support mode 0,1 and 2) xx07H Multiword DMA Transfer Capability 15 8 Multi word DMA transfer mode active 7 0(=7) Multi word DMA transfer modes supported (support mode 0,1 and 2) 0003H Flow Control PIO Transfer Modes Supported 15 8(=0) Reserved 7 0(=3) Advanced PIO Transfer Modes Supported '11' = PIO Mode 3 and 4 Supported 0078H Minimum Multiword DMA Transfer Cycle Time Per Word 15 0(=78) Cycle time in nanoseconds (120ns, 16.6MB/s) Figure 80. Identify device information --- Continued --- 106 OEM Specifications for DTTA-3xxxxx

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Word
Content
Description
49
xF00H
Capabilities, bit assignments:
15 14(=0) Reserved
13
Standby timer
(=1)
values as specified in ATA standard are
supported
(=0)
values are vendor specific
12(=0) Reserved
11(=1) IORDY Supported
10(=1) IORDY can be disabled
9(=1) Reserved
8(=1) Reserved
*
7
0(=0) Reserved
50
400xH
Capabilities, bit assignments:
15 14(=01) Word 50 is valid
13
1(=0) Reserved
0
Minimum value of Standby timer
(=0) less than 5 minutes
(=1) equal to or greater than 5 minutes
51
0200H
PIO data transfer cycle timing mode
52
0200H
*
DMA data transfer cycle timing mode
Refer Word 62 and 63
53
0007H
Validity flag of the word
15
3(=0) Reserved
2(=1) 1=Word 88 are Valid
1(=1) 1=Word 64 70 are Valid
0(=1) 1=Word 54 58 are Valid
54
xxxxH
Number of current cylinders
55
xxxxH
Number of current heads
56
xxxxH
Number of current sectors per track
57 58
xxxxH
Current capacity in sectors
Word 57 specifies the low word of the capacity
59
0xxxH
Current Multiple setting. bit assignments
15
9(=0)
Reserved
8
1= Multiple Sector Setting is Valid
7
0
xxh = Current setting for number of sectors
60 61
xxxxH
Total Number of User Addressable Sectors
Word 60 specifies the low word of the number
62
xx07H
*
Single Word DMA Transfer Capability
15
8
Single word DMA transfer mode active
7
0(=7) Single word DMA transfer modes supported
(support mode 0,1 and 2)
63
xx07H
Multiword DMA Transfer Capability
15
8
Multi word DMA transfer mode active
7
0(=7) Multi word DMA transfer modes supported
(support mode 0,1 and 2)
64
0003H
Flow Control PIO Transfer Modes Supported
15
8(=0) Reserved
7
0(=3) Advanced PIO Transfer Modes Supported
'11' = PIO Mode 3 and 4 Supported
65
0078H
Minimum Multiword DMA Transfer Cycle Time Per Word
15
0(=78) Cycle time in nanoseconds (120ns, 16.6MB/s)
Figure 80. Identify device information --- Continued ---
106
OEM Specifications for DTTA-3xxxxx