IBM DTTA-351010 Hard Drive Specifications - Page 171

Write DMA Queued CCh

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12.36 Write DMA Queued (CCh) Command Block Output Registers Register 76543210 Data Feature VVVVVVVV Sector Count V V V V V V V V Sector Number V V V V V V V V Cylinder Low V V V V V V V V Cylinder High V V V V V V V V Device/Head 1L1DHHHH Command 11001100 Command Block Input Registers Register 76543210 Data Error ...See Below... Sector Count V V V V V V V V Sector Number V V V V V V V V Cylinder Low V V V V V V V V Cylinder High V V V V V V V V Device/Head HHHH Status ...See Below... Error Register 76543210 CRC UNC 0 IDN 0 ABT T0N AMN V00V0V0V Status Register 76543210 BSY RDY DF SRV DRQ COR IDX ERR 0V0V 0 V Figure 124. Write DMA Queued Command (CCh) This command executes in a similar manner to a WRITE DMA command. The device may perform a bus release or it may execute the data transfer without performing a bus release if the data is ready to transfer. If the device performs a bus release, the host shall reselect the device using the SERVICE command. Once the data transfer is begun, the device does not perform a bus release until the entire data transfer has been completed. Output Parameters To The Device Feature number of sectors to be transferred. A value of 00h indicates that 256 sectors are to be transferred. Sector Count bits 7 - 3 (Tag) contain the Tag for the command being delivered. Sector Number starting sector number or LBA address bits 7 - 0. Cylinder High/Low starting cylinder number or LBA address bits 23 - 8. H starting head number or LBA address bits 27 - 24. Command Descriptions 163

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12.36
Write DMA Queued (CCh)
Command Block Output Registers
Command Block Input Registers
Register
76543210
Register
76543210
Data
Data
Feature
VVVVVVVV
Error
...See Below...
Sector Count
VVVVVVVV
Sector Count
VVVVVVVV
Sector Number
VVVVVVVV
Sector Number
VVVVVVVV
Cylinder Low
VVVVVVVV
Cylinder Low
VVVVVVVV
Cylinder High
VVVVVVVV
Cylinder High
VVVVVVVV
Device/Head
1L1DHHHH
Device/Head
HHHH
Command
11001100
Status
...See Below...
Error Register
Status Register
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
CRC UNC
0
IDN
0
ABT T0N AMN
BSY RDY DF
SRV DRQ COR IDX ERR
V
0
0
V
0
V
0
V
0
V
0
V
0
V
Figure 124. Write DMA Queued Command (CCh)
This command executes in a similar manner to a WRITE DMA command.
The device may perform a bus
release or it may execute the data transfer without performing a bus release if the data is ready to transfer.
If the device performs a bus release, the host shall reselect the device using the SERVICE command.
Once the data transfer is begun, the device does not perform a bus release until the entire data transfer has
been completed.
Output Parameters To The Device
Feature
number of sectors to be transferred. A value of 00h indicates that 256 sectors are to
be transferred.
Sector Count
bits 7 - 3 (Tag) contain the Tag for the command being delivered.
Sector Number
starting sector number or LBA address bits 7 - 0.
Cylinder High/Low
starting cylinder number or LBA address bits 23 - 8.
H
starting head number or LBA address bits 27 - 24.
Command Descriptions
163