IBM DTTA-351010 Hard Drive Specifications - Page 85

Power Management Feature

Get IBM DTTA-351010 - Deskstar 10.1 GB Hard Drive PDF manuals and user guides View all IBM DTTA-351010 manuals
Add to My Manuals
Save this manual to your list of manuals

Page 85 highlights

For the READ DMA QUEUED and WRITE DMA QUEUED commands, the device may or may not perform a bus release. If the device is ready to complete execution of the command, it may complete the command immediately. If the device is not ready to complete execution of the command, the device may perform a bus release and complete the command via a service request. Command queuing allows the host to issue concurrent commands to the same device. Only commands included in the overlapped feature set may be queued. If a queue exists when a non-queued command is received, the non-queued command shall be aborted and the commands in the queue shall be discarded. The ending status shall be ABORT command and the results are indeterminant. The maximum queue depth supported by a device is indicated in word 73 of the Identify Device information. A queued command shall have a Tag provided by the host in the Sector Count register to uniquely identify the command. When the device restores register parameters during the execution of the SERVICE command, this Tag shall be restored so that the host may identify the command for which status is being presented. If a queued command is issued with a Tag value that is identical to the Tag value for a command already in the queue, the entire queue is aborted including the new command. The ending status is ABORT command and the results are indeterminant. If any error occurs, the command queue is aborted. When the device is ready to continue the processing of a bus released command and BSY and D R Q are both cleared to zero, the device requests service by setting SERV to one, setting a pending interrupt, and asserting I N T R Q if selected and if nIEN is cleared to zero. SERV shall remain set until all commands ready for service have been serviced. The pending interrupt shall be cleared and INTRQ negated by a Status register read or a write to the Command register. When the device is ready to continue the processing of a bus released command and BSY or D R Q is set to one (i.e., the device is processing another command on the bus), the device requests service by setting SERV to one. SERV shall remain set until all commands ready for service have been serviced. At command completion of the current command processing (i.e., when both BSY and D R Q are cleared to zero), the device shall process interrupt pending and INTRQ per the protocol for the command being completed. No additional interrupt shall occur due to other commands ready for service until after the device's SERV bit has been cleared to zero. When the device receives a new command while queued commands are ready for service, the device shall execute the new command and process interrupt pending and INTRQ per the protocol for the new command. If the queued commands ready for service still exist at command completion of this command, SERV remains set to one but no additional interrupt shall occur due to commands ready for service. When queuing commands, the host shall disable interrupts via the nIEN bit before writing a new command to the Command register and may re-enable interrupts after writing the command. When reading status at command completion of a command, the host shall check the SERV bit since the SERV bit may be set because the device is ready for service associated with another queued command. The host receives no additional interrupt to indicate that a queued command is ready for service. 10.5 Power Management Feature The power management feature set permits a host to modify the behavior of a manner which reduces the power required to operate. The power management feature set provides a set of commands and a timer that enable a device to implement low power consumption modes. DTTA-3xxxxx implement the following set of functions. 1. A Standby timer General Operation Descriptions 77

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
  • 129
  • 130
  • 131
  • 132
  • 133
  • 134
  • 135
  • 136
  • 137
  • 138
  • 139
  • 140
  • 141
  • 142
  • 143
  • 144
  • 145
  • 146
  • 147
  • 148
  • 149
  • 150
  • 151
  • 152
  • 153
  • 154
  • 155
  • 156
  • 157
  • 158
  • 159
  • 160
  • 161
  • 162
  • 163
  • 164
  • 165
  • 166
  • 167
  • 168
  • 169
  • 170
  • 171
  • 172
  • 173
  • 174
  • 175
  • 176
  • 177
  • 178
  • 179
  • 180
  • 181
  • 182
  • 183
  • 184
  • 185
  • 186
  • 187
  • 188
For the READ DMA QUEUED and WRITE DMA QUEUED commands, the device may or may not
perform a bus release.
If the device is ready to complete execution of the command, it may complete the
command immediately. If the device is not ready to complete execution of the command, the device may
perform a bus release and complete the command via a service request.
Command queuing allows the host to issue concurrent commands to the same device.
Only commands
included in the overlapped feature set may be queued.
If a queue exists when a non-queued command is
received, the non-queued command shall be aborted and the commands in the queue shall be discarded.
The ending status shall be ABORT command and the results are indeterminant.
The maximum queue depth supported by a device is indicated in word 73 of the Identify Device informa-
tion.
A queued command shall have a Tag provided by the host in the Sector Count register to uniquely identify
the
command.
When
the
device restores
register
parameters
during
the
execution
of
the
SERVICE
command, this Tag shall be restored so that the host may identify the command for which status is being
presented.
If a queued command is issued with a Tag value that is identical to the Tag value for a command
already in the queue, the entire queue is aborted including the new command.
The ending status is ABORT
command and the results are indeterminant.
If any error occurs, the command queue is aborted.
When the device is ready to continue the processing of a bus released command and BSY and DRQ are
both cleared to zero, the device requests service by setting SERV to one, setting a pending interrupt, and
asserting INTRQ if selected and if nIEN is cleared to zero. SERV shall remain set until all commands ready
for service have been serviced. The pending interrupt shall be cleared and INTRQ negated by a Status reg-
ister read or a write to the Command register.
When the device is ready to continue the processing of a bus released command and BSY or DRQ is set to
one (i.e., the device is processing another command on the bus), the device requests service by setting SERV
to one. SERV shall remain set until all commands ready for service have been serviced. At command com-
pletion of the current command processing (i.e., when both BSY and DRQ are cleared to zero), the device
shall process interrupt pending and INTRQ per the protocol for the command being completed.
No addi-
tional interrupt shall occur due to other commands ready for service until after the device's SERV bit has
been cleared to zero.
When the device receives a new command while queued commands are ready for service, the device shall
execute
the
new
command
and
process
interrupt
pending
and
INTRQ
per
the
protocol
for the
new
command.
If the queued commands ready for service still exist at command completion of this command,
SERV remains set to one but no additional interrupt shall occur due to commands ready for service.
When queuing commands, the host shall disable interrupts via the nIEN bit before writing a new command
to the Command register and may re-enable interrupts after writing the command.
When reading status at
command completion of a command, the host shall check the SERV bit since the SERV bit may be set
because the device is ready for service associated with another queued command. The host receives no addi-
tional interrupt to indicate that a queued command is ready for service.
10.5 Power Management Feature
The power management feature set permits a host to modify the behavior of a manner which reduces the
power required to operate. The power management feature set provides a set of commands and a timer that
enable a device to implement low power consumption modes.
DTTA-3xxxxx implement the following set of functions.
1.
A Standby timer
General Operation Descriptions
77