IBM DTTA-351010 Hard Drive Specifications - Page 150

PIO Flow Control Transfer Mode x

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DDH Disable release interrupt Note 1. When Feature register is 03h ( = S e t Transfer mode), the Sector Count Register specifies the transfer mechanism. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value. PIO Default Transfer Mode PIO Default Transfer Mode,Disable IORDY PIO Flow Control Transfer Mode x Single word DMA mode x Multiword DMA mode x Ultra DMA mode x 00000 000 00000 001 00001 nnn (nnn=000,001,010,011,100) 00010 nnn (nnn=000,001,010) 00100 nnn (nnn=000,001,010) 01000 nnn (nnn=000,001,010) Note 2. If the number of auto reassigned sector reaches the device's reassignment capacity, the write cache function will be automatically disabled. Although the device still accepts the Set Features command with Feature register = 02h without error, but the write cache function will remains disabled. For current write cache function status, please refer to Identify Device Information(word 85 or 129) by Identify Device command. Note 3. After power on reset or hard reset, the device is set to the following features as default. Write cache ECC bytes Read look-ahead Reverting to power on defaults Release interrupt : Enable : 4 bytes : Enable : Disable : Disable 142 OEM Specifications for DTTA-3xxxxx

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DDH
Disable release interrupt
Note 1.
When Feature register is 03h (=Set Transfer mode), the Sector Count Register specifies the transfer mech-
anism. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value.
PIO Default Transfer Mode
00000 000
PIO Default Transfer Mode,Disable IORDY
00000 001
PIO Flow Control Transfer Mode x
00001 nnn (nnn=000,001,010,011,100)
Single word DMA mode x
00010 nnn (nnn=000,001,010)
Multiword DMA mode x
00100 nnn (nnn=000,001,010)
Ultra DMA mode x
01000 nnn (nnn=000,001,010)
Note 2.
If the number of auto reassigned sector reaches the device's reassignment capacity, the write cache function
will be automatically disabled.
Although the device still accepts the Set Features command with Feature
register =
02h without error, but the write cache function will remains disabled.
For current write cache
function status, please refer to Identify Device Information(word 85 or 129) by Identify Device command.
Note 3.
After power on reset or hard reset, the device is set to the following features as default.
Write cache
: Enable
ECC bytes
: 4 bytes
Read look-ahead
: Enable
Reverting to power on defaults
: Disable
Release interrupt
: Disable
142
OEM Specifications for DTTA-3xxxxx