Intel D848PMB Technical Product Specification - Page 21

System Memory

Get Intel D848PMB PDF manuals and user guides View all Intel D848PMB manuals
Add to My Manuals
Save this manual to your list of manuals

Page 21 highlights

Product Description 1.6 System Memory The Desktop Board D848PMB has two DIMM sockets and supports the following memory features: • 2.6 V (only) 184-pin DDR SDRAM DIMMs with gold-plated contacts • Unbuffered, single-sided or double-sided DIMMs with the following restriction: Double-sided DIMMS with x16 organization are not supported. • 2 GB maximum total system memory. • Minimum total system memory: 64 MB • Non-ECC DIMMs • Serial Presence Detect • DDR400, DDR333, and DDR266 SDRAM DIMMs Table 4 lists the supported system bus frequency and memory speed combinations. Table 4. Supported System Bus Frequency and Memory Speed Combinations To use this type of DIMM... The processor's system bus frequency must be... DDR400 DDR333 (Note) 800 MHz 800 or 533 MHz DDR266 800, 533, or 400 MHz Note: When using an 800 MHz system bus frequency processor, DDR333 memory is clocked at 320 MHz. This minimizes system latencies to optimize system throughput. ✏ NOTES To be fully compliant with all applicable DDR SDRAM memory specifications, the board should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure. This allows the BIOS to read the SPD data and program the chipset to accurately configure memory settings for optimum performance. If non-SPD memory is installed, the BIOS will attempt to correctly configure the memory settings, but performance and reliability may be impacted or the DIMMs may not function under the determined frequency. For information about Obtaining DDR SDRAM specifications Refer to Section 1.4, page 17 21

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
Product Description
21
1.6 System Memory
The Desktop Board D848PMB has two DIMM sockets and supports the following memory
features:
•
2.6 V (only) 184-pin DDR SDRAM DIMMs with gold-plated contacts
•
Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMS with x16 organization are not supported.
•
2 GB maximum total system memory.
•
Minimum total system memory:
64 MB
•
Non-ECC DIMMs
•
Serial Presence Detect
•
DDR400, DDR333, and DDR266 SDRAM DIMMs
Table 4 lists the supported system bus frequency and memory speed combinations.
Table 4.
Supported System Bus Frequency and Memory Speed Combinations
To use this type of DIMM
…
The processor's system bus frequency must be
…
DDR400
800 MHz
DDR333
(Note)
800 or 533 MHz
DDR266
800, 533, or 400 MHz
Note:
When using an 800 MHz system bus frequency processor, DDR333 memory is clocked at 320 MHz.
This
minimizes system latencies to optimize system throughput.
✏
NOTES
To be fully compliant with all applicable DDR SDRAM memory specifications, the board should be
populated with DIMMs that support the Serial Presence Detect (SPD) data structure.
This allows
the BIOS to read the SPD data and program the chipset to accurately configure memory settings
for optimum performance.
If non-SPD memory is installed, the BIOS will attempt to correctly
configure the memory settings, but performance and reliability may be impacted or the DIMMs
may not function under the determined frequency.
For information about
Refer to
Obtaining DDR SDRAM specifications
Section 1.4, page 17