Intel S3420GPLC Product Specification - Page 115
Residual Voltage Immunity in Standby Mode, Protection Circuits
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Intel® Server Board S3420GP TPS Design and Environmental Specifications Item T5VSB_holdup Description Duration for which the 5 VSB output voltage stays within regulation after loss of AC. Minimum 70 Maximum N/A Units Msec Figure 42. Turn On/Off Timing (Power Supply Signals) 10.4.11 Residual Voltage Immunity in Standby Mode The power supply is immune to any residual voltage placed on its outputs (typically, a leakage voltage through the system from standby output) up to 500 mV. There is no additional heat generated nor stressing of any internal components with this voltage applied to any individual output and all outputs simultaneously. It also does not trip the power supply protection circuits during turn on. The residual voltage at the power supply outputs for a no-load condition does not exceed 100 mV when AC voltage is applied and the PSON# signal is de-asserted. 10.4.12 Protection Circuits Protection circuits inside the power supply should cause only the power supply's main outputs to shut down. If the power supply latches off due to a protection circuit tripping, an AC cycle OFF for 15 seconds and a PSON# cycle HIGH for 1 second should reset the power supply. 10.4.12.1 Over-current Protection (OCP) The power supply has current limits to prevent the +3.3 V, +5 V, and +12 V outputs from exceeding the values shown in the following table. If the current limits are exceeded, the power supply shuts down and latches off. The latch is cleared by toggling the PSON# signal or using an AC power interruption. The power supply is not damaged from repeated power cycling in this condition. -12 V and 5 VSB are protected under over-current or shorted conditions so no damage can occur to the power supply. Auto-recovery feature is a requirement on 5 VSB rail. Revision 2.4 103 Intel order number E65697-010