Intel S3420GPLC Product Specification - Page 33

ECC Support, 2.4.1, TableMemory Subsystem Operating Frequency Determination, 2.4.2, Memory

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Intel® Server Board S3420GP TPS Functional Architecture 3.2.3.3 ECC Support Only ECC memory is supported on this platform. 3.2.4 Memory Map and Population Rules The following nomenclature is followed for DIMM sockets: Note: Intel® Server Board S3420GP may support up to three DIMM sockets per channel. Table 3. Standard Platform DIMM Nomenclature Channel A Channel B A1 A2 A3 B1 B2 B3 3.2.4.1 TableMemory Subsystem Operating Frequency Determination The rules for determining the operating frequency of the memory channels are simple, but not necessarily straightforward. There are several limiting factors, including the number of DIMMs on a channel and organization of the DIMM - that is, either single-rank (SR), dual-rank (DR), or quad-rank (QR):  The speed of the processor's IMC is the maximum speed possible.  The speed of the slowest component - the slowest DIMM or the IMC - determines the maximum frequency, subject to further limitations.  A single 1333-MHz DIMM (SR or DR) on a channel may run at full 1333-MHz speed.  If two SR/DR DIMMs are installed on a channel, the speed is limited to 1066 MHZ.  A single QR RDIMM on a channel is limited to 1066 MHz.  Two QR RDIMMs or a mix of QR + SR/DR on a channel is limited to 800 MHz. 3.2.4.2 Memory Subsystem Nomenclature 1. DIMMs are organized into physical slots on DDR3 memory channels that belong to processor sockets. 2. The memory channels are identified as channels A, B. 3. For Intel® Xeon® 3400 Series, each socket can support a maximum of six DIMM sockets (three DIMM sockets per channel), which can support a maximum of six DIMM sockets. 4. The Intel® Xeon® Processor 3400 Series on the Intel® Server Board S3420GP is populated on the processor socket. It has an Integrated Memory Controller (IMC). The IMC provides two DDR3 channels and groups DIMMs on the board into an autonomous memory. 5. The DIMM identifiers on the silkscreen on the board provide information about the channel and the processor socket to which they belong. For example, DIMM_A1 is the first slot on channel A. 3.2.4.3 Memory Upgrade Rules Upgrading the system memory requires careful positioning of the DDR3 DIMMs based on the following factors: Revision 2.4 21 Intel order number E65697-010

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Intel® Server Board S3420GP TPS
Functional Architecture
Revision 2.4
Intel order number E65697-010
21
3.2.3.3
ECC Support
Only ECC memory is supported on this platform.
3.2.4
Memory Map and Population Rules
The following nomenclature is followed for DIMM sockets:
Note:
Intel
®
Server Board S3420GP may support up to three DIMM sockets per channel.
Table 3. Standard Platform DIMM Nomenclature
Channel A
Channel B
A1
A2
A3
B1
B2
B3
3.2.4.1
TableMemory Subsystem Operating Frequency Determination
The rules for determining the operating frequency of the memory channels are simple, but not
necessarily straightforward. There are several limiting factors, including the number of DIMMs
on a channel and organization of the DIMM - that is, either single-rank (SR), dual-rank (DR), or
quad-rank (QR):
The speed of the processor’s IMC is the maximum speed possible.
The speed of the slowest component – the slowest DIMM or the IMC – determines the
maximum frequency, subject to further limitations.
A single 1333-MHz DIMM (SR or DR) on a channel may run at full 1333-MHz speed.
If two SR/DR DIMMs are installed on a channel, the speed is limited to 1066 MHZ.
A single QR RDIMM on a channel is limited to 1066 MHz.
Two QR RDIMMs or a mix of QR + SR/DR on a channel is limited to 800 MHz.
3.2.4.2
Memory Subsystem Nomenclature
1.
DIMMs are organized into physical slots on DDR3 memory channels that belong to
processor sockets.
2.
The memory channels are identified as channels A, B.
3. For Intel
®
Xeon
®
3400 Series, each socket can support a maximum of six DIMM
sockets (three DIMM sockets per channel), which can support a maximum of six
DIMM sockets.
4. The Intel
®
Xeon
®
Processor 3400 Series on the Intel
®
Server Board S3420GP is
populated on the processor socket. It has an Integrated Memory Controller (IMC).
The IMC provides two DDR3 channels and groups DIMMs on the board into an
autonomous memory.
5.
The DIMM identifiers on the silkscreen on the board provide information about the
channel and the processor socket to which they belong. For example, DIMM_A1 is
the first slot on channel A.
3.2.4.3
Memory Upgrade Rules
Upgrading the system memory requires careful positioning of the DDR3 DIMMs based on the
following factors: