Lenovo NetVista A22 User guide for NetVista 2254, 2256, 2257, 6336, 6337, 6339 - Page 78

Address hex, Description, Byte pointer, Table 3. DMA I/O address map continued

Page 78 highlights

Table 3. DMA I/O address map (continued) Address (hex) Description 008B Channel 5, page table address register 008F Channel 4, page table address/refresh register 00C0 Channel 4, memory address register 00C2 Channel 4, transfer count register 00C4 Channel 5, memory address register 00C6 Channel 5, transfer count register 00C8 Channel 6, memory address register 00CA Channel 6, transfer count register 00CC Channel 7, memory address register 00CE Channel 7, transfer count register 00D0 Channels 4-7, read status/write command register 00D2 Channels 4-7, write request register 00D4 Channels 4-7, write single mask register bit 00D6 Channels 4-7, mode register (write) 00D8 Channels 4-7, clear byte pointer (write) 00DA Channels 4-7, master clear (write)/temp (read) 00DC Channels 4-7, clear mask register (write) 00DE Channels 4-7, write all mask register bits 00DF Channels 5-7, 8- or 16-bit mode select Bits 00 - 07 00 - 07 00 - 15 00 - 15 00 - 15 00 - 15 00 - 15 00 - 15 00 - 15 00 - 15 00 - 07 00 - 02 00 - 02 00 - 07 N/A 00 - 07 00 - 03 00 - 03 00 - 07 Byte pointer Yes Yes Yes Yes Yes Yes Yes Yes 66 User Guide

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86

Table 3. DMA I/O address map (continued)
Address (hex)
Description
Bits
Byte pointer
008B
Channel 5, page table address register
00
07
008F
Channel 4, page table address/refresh register
00
07
00C0
Channel 4, memory address register
00
15
Yes
00C2
Channel 4, transfer count register
00
15
Yes
00C4
Channel 5, memory address register
00
15
Yes
00C6
Channel 5, transfer count register
00
15
Yes
00C8
Channel 6, memory address register
00
15
Yes
00CA
Channel 6, transfer count register
00
15
Yes
00CC
Channel 7, memory address register
00
15
Yes
00CE
Channel 7, transfer count register
00
15
Yes
00D0
Channels 4
7, read status/write command register
00
07
00D2
Channels 4
7, write request register
00
02
00D4
Channels 4
7, write single mask register bit
00
02
00D6
Channels 4
7, mode register (write)
00
07
00D8
Channels 4
7, clear byte pointer (write)
N/A
00DA
Channels 4
7, master clear (write)/temp (read)
00
07
00DC
Channels 4
7, clear mask register (write)
00
03
00DE
Channels 4
7, write all mask register bits
00
03
00DF
Channels 5
7, 8- or 16-bit mode select
00
07
66
User Guide