Asus Pro WS WRX90E-SAGE SE AMD TR5 Series BIOS Manual English - Page 22

CK Tx Phase Shift Clk

Page 22 highlights

Rtt Wr Configuration options: [Auto] [RTT_OFF] [RZQ (240)] [RZQ/2 (120)] [RZQ/3 (80)] [RZQ/4 (60)] [RZQ/5 (48)] [RZQ/6 (40)] [RZQ/7 (34)] Rtt Park Configuration options: [Auto] [RTT_OFF] [RZQ (240)] [RZQ/2 (120)] [RZQ/3 (80)] [RZQ/4 (60)] [RZQ/6 (40)] [RZQ/7 (34)] Rtt Park Dqs Configuration options: [Auto] [RTT_OFF] [RZQ (240)] [RZQ/2 (120)] [RZQ/3 (80)] [RZQ/4 (60)] [RZQ/5 (48)] [RZQ/6 (40)] [RZQ/7 (34)] Power Down Enable Configuration options: [Disabled] [Enabled] [Auto] Memory Context Restore Configure the memory context restore mode. When enabled, DRAM re-retraining is avoided when possible and the POST latency is minimized. Configuration options: [Auto] [Enabled] [Disabled] UCLK DIV1 MODE Configuration options: [Auto] [UCLK=MEMCLK] [UCLK=MEMCLK/2] CA Tx Phase Shift Clk Configuration options: [Auto] [0] - [7] CS Tx Phase Shift Clk Configuration options: [Auto] [0] - [7] CK Tx Phase Shift Clk Configuration options: [Auto] [0] - [7] CA Rx Phase Shift Clk Configuration options: [Auto] [0] - [7] CS Rx Phase Shift Clk Configuration options: [Auto] [0] - [7] CK Rx Phase Shift Clk Configuration options: [Auto] [0] - [7] FIFO Wr En Fine Delay Configuration options: [Auto] [0] - [1] POC Sample PD Configuration options: [Auto] [Enabled] [Disabled] Bank Swap Mode Configuration options: [Auto] [Disabled] [Swap CPU] [Swap APU] Mem Over Clock Fail Count Configuration options: [Auto] [RTT_OFF] [RZQ (240)] [RZQ/2 (120)] [RZQ/3 (80)] [RZQ/4 (60)] [RZQ/5 (48)] [RZQ/6 (40)] [RZQ/7 (34)] 22 Pro WS sTR5 Series BIOS Manual

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22
Pro WS sTR5 Series BIOS Manual
Rtt Wr
Configuration options: [Auto] [RTT_OFF] [RZQ (240)] [RZQ/2 (120)] [RZQ/3 (80)]
[RZQ/4 (60)] [RZQ/5 (48)] [RZQ/6 (40)] [RZQ/7 (34)]
Rtt Park
Configuration options: [Auto] [RTT_OFF] [RZQ (240)] [RZQ/2 (120)] [RZQ/3 (80)]
[RZQ/4 (60)] [RZQ/6 (40)] [RZQ/7 (34)]
Rtt Park Dqs
Configuration options: [Auto] [RTT_OFF] [RZQ (240)] [RZQ/2 (120)] [RZQ/3 (80)]
[RZQ/4 (60)] [RZQ/5 (48)] [RZQ/6 (40)] [RZQ/7 (34)]
Power Down Enable
Configuration options: [Disabled] [Enabled] [Auto]
Memory Context Restore
Configure the memory context restore mode. When enabled, DRAM re-retraining is
avoided when possible and the POST latency is minimized.
Configuration options: [Auto] [Enabled] [Disabled]
UCLK DIV1 MODE
Configuration options: [Auto] [UCLK=MEMCLK] [UCLK=MEMCLK/2]
CA Tx Phase Shift Clk
Configuration options: [Auto] [0] - [7]
CS Tx Phase Shift Clk
Configuration options: [Auto] [0] - [7]
CK Tx Phase Shift Clk
Configuration options: [Auto] [0] - [7]
CA Rx Phase Shift Clk
Configuration options: [Auto] [0] - [7]
CS Rx Phase Shift Clk
Configuration options: [Auto] [0] - [7]
CK Rx Phase Shift Clk
Configuration options: [Auto] [0] - [7]
FIFO Wr En Fine Delay
Configuration options: [Auto] [0] - [1]
POC Sample PD
Configuration options: [Auto] [Enabled] [Disabled]
Bank Swap Mode
Configuration options: [Auto] [Disabled] [Swap CPU] [Swap APU]
Mem Over Clock Fail Count
Configuration options: [Auto] [RTT_OFF] [RZQ (240)] [RZQ/2 (120)] [RZQ/3 (80)]
[RZQ/4 (60)] [RZQ/5 (48)] [RZQ/6 (40)] [RZQ/7 (34)]