Asus Pro WS WRX90E-SAGE SE AMD TR5 Series BIOS Manual English - Page 85

DFI Channel Timing Configuration, Twrrd Ctrl

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The following item appears only when TwrwrSd Ctrl is set to [Manual]. TwrwrSd Specifies the Write to Write turnaround timing in the same DIMM. Valid values: 0x1 - 0xF. TwrwrDd Ctrl [Auto] Follow default setting. [Manual] Manually specify. The following item appears only when TwrwrDd Ctrl is set to [Manual]. TwrwrDd Specifies the Write to Write turnaround timing in a different DIMM. Valid values: 0x1 - 0xF. Twrrd Ctrl [Auto] [Manual] Follow default setting. Manually specify. The following item appears only when Twrrd Ctrl is set to [Manual]. Twrrd Specifies the Write to Read turnaround timing. Valid values: 0x1 - 0xF. Trdwr Ctrl [Auto] [Manual] Follow default setting. Manually specify. The following item appears only when Trdwr Ctrl is set to [Manual]. Trdwr Specifies the Read to Write turnaround timing. Valid values: 0x1 - 0x1F. The value is in hex. DFI Channel Timing Configuration RxDatChnDly Configures the RX timing between memory controller and PHY. Higher value may enable increased memory frequency at the expense of increased latency. Configuration options: [Auto] [1] [2] TxDatChnDly Configures the TX timing between memory controller and PHY. Higher value may enable increased memory frequency at the expense of increased latency. Configuration options: [0] [1] [2] [3] [Auto] TxCtrlChnDly Configures the command timing between memory controller and PHY. Higher value may enable increased memory frequency at the expense of increased latency. Configuration options: [0] [1] [Auto] Pro WS sTR5 Series BIOS Manual 85

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Pro WS sTR5 Series BIOS Manual
85
The following item appears only when
TwrwrSd Ctrl
is set to
[Manual]
.
TwrwrSd
Specifies the Write to Write turnaround timing in the same DIMM.
Valid values: 0x1 - 0xF.
TwrwrDd Ctrl
[Auto]
Follow default setting.
[Manual]
Manually specify.
The following item appears only when
TwrwrDd Ctrl
is set to
[Manual]
.
TwrwrDd
Specifies the Write to Write turnaround timing in a different DIMM.
Valid values: 0x1 - 0xF.
Twrrd Ctrl
[Auto]
Follow default setting.
[Manual]
Manually specify.
The following item appears only when
Twrrd Ctrl
is set to
[Manual]
.
Twrrd
Specifies the Write to Read turnaround timing. Valid values: 0x1 -
0xF.
Trdwr Ctrl
[Auto]
Follow default setting.
[Manual]
Manually specify.
The following item appears only when
Trdwr Ctrl
is set to
[Manual]
.
Trdwr
Specifies the Read to Write turnaround timing. Valid values: 0x1 -
0x1F. The value is in hex.
DFI Channel Timing Configuration
RxDatChnDly
Configures the RX timing between memory controller and PHY.
Higher value may enable increased memory frequency at the expense
of increased latency.
Configuration options: [Auto] [1] [2]
TxDatChnDly
Configures the TX timing between memory controller and PHY.
Higher value may enable increased memory frequency at the expense
of increased latency.
Configuration options: [0] [1] [2] [3] [Auto]
TxCtrlChnDly
Configures the command timing between memory controller and PHY.
Higher value may enable increased memory frequency at the expense
of increased latency.
Configuration options: [0] [1] [Auto]