Asus Pro WS WRX90E-SAGE SE AMD TR5 Series BIOS Manual English - Page 79

DRAM Corrected Error Counter Interrupt Enable

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The following item appears only when you set DRAM UECC Retry to [Enabled]. Max DRAM UECC Error Replay Program to UMC::RecCtrl2 [MaxEccRply], valid value: 1 - 3F. The values are in hex. Configuration options: [1] - [3F] Memory Clear Clear/Zero out DRAM range [DramScrubLimitAddr:DramScrubLimitAddr]. When this option is disabled, memory is not cleared after training. ECC DIMMs have memory clear enabled always. Non-ECC DIMMs can choose to disable/enable using this option. Configuration options: [Enabled] [Disabled] [Auto] Address XOR after ECC In order to provide data integrity when data is returned from the wrong address, UMC will hash the data after ECC with the normalized address. Configuration options: [Enabled] [Disabled] [Auto] DRAM Scrubbers DRAM ECS Mode Setting this item to [Auto] will set ECS to Manual mode. Configuration options: [AutoECS] [ManualECS] [Auto] DRAM Redirect Scrubber Enable Allows you to enable or disable Dram Redirect Scrubber. Configuration options: [Disabled] [Enabled] [Auto] DRAM Scrub Redirection Limit Dram Redirect Scrub Redirection Limit: 0=8 scrubs, 1=4 scrubs, 2=2 scrubs, 3=1 scrubs. Configuration options: [8 Scrubs] [4 Scrubs] [2 Scrubs] [1 Scrubs] [Auto] DRAM Patrol Scrubber Enable Allows you to enable or disable DRAM Patrol Scrubber. Setting this item to [Auto] will set this item to disabled. Configuration options: [Disabled] [Enabled] [Auto] DRAM Corrected Error Counter Enable Allows you to configure the DRAM Corrected Error Counter function. Configuration options: [Disable] [NoLeakMode] [LeakMode] DRAM Corrected Error Counter Interrupt Enable Allows you to enable SMI when DRAM Corrected Error Counter count exceeds the threshold value. Configuration options: [False] [True] DRAM Corrected Error Counter Leak Rate Program Rate value for DRAM Corrected Error Counter function. Configuration options: [0] - [1F] DRAM Corrected Error Counter Start Count Program starting count value for DRAM Corrected Error Counter function. Configuration options: [0] - [FFFF] PMIC Error Reporting Allows you to enable support for PMMIC Error Reporting. Configuration options: [False] [True] [Auto] DDR Bus Configuration This item allows you to configure DDR Bus Configuration. Pro WS sTR5 Series BIOS Manual 79

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Pro WS sTR5 Series BIOS Manual
79
The following item appears only when you set
DRAM UECC Retry
to
[Enabled]
.
Max DRAM UECC Error Replay
Program to UMC::RecCtrl2 [MaxEccRply], valid value: 1 - 3F. The
values are in hex.
Configuration options: [1] - [3F]
Memory Clear
Clear/Zero out DRAM range
[DramScrubLimitAddr:DramScrubLimitAddr]. When this option is
disabled, memory is not cleared after training. ECC DIMMs have
memory clear enabled always. Non-ECC DIMMs can choose to
disable/enable using this option.
Configuration options: [Enabled] [Disabled] [Auto]
Address XOR after ECC
In order to provide data integrity when data is returned from the
wrong address, UMC will hash the data after ECC with the normalized
address.
Configuration options: [Enabled] [Disabled] [Auto]
DRAM Scrubbers
DRAM ECS Mode
Setting this item to
[Auto]
will set ECS to Manual mode.
Configuration options: [AutoECS] [ManualECS] [Auto]
DRAM Redirect Scrubber Enable
Allows you to enable or disable Dram Redirect Scrubber.
Configuration options: [Disabled] [Enabled] [Auto]
DRAM Scrub Redirection Limit
Dram Redirect Scrub Redirection Limit: 0=8 scrubs, 1=4 scrubs, 2=2
scrubs, 3=1 scrubs.
Configuration options: [8 Scrubs] [4 Scrubs] [2 Scrubs] [1 Scrubs]
[Auto]
DRAM Patrol Scrubber Enable
Allows you to enable or disable DRAM Patrol Scrubber. Setting this
item to
[Auto]
will set this item to disabled.
Configuration options: [Disabled] [Enabled] [Auto]
DRAM Corrected Error Counter Enable
Allows you to configure the DRAM Corrected Error Counter function.
Configuration options: [Disable] [NoLeakMode] [LeakMode]
DRAM Corrected Error Counter Interrupt Enable
Allows you to enable SMI when DRAM Corrected Error Counter count exceeds
the threshold value.
Configuration options: [False] [True]
DRAM Corrected Error Counter Leak Rate
Program Rate value for DRAM Corrected Error Counter function.
Configuration options: [0] - [1F]
DRAM Corrected Error Counter Start Count
Program starting count value for DRAM Corrected Error Counter function.
Configuration options: [0] - [FFFF]
PMIC Error Reporting
Allows you to enable support for PMMIC Error Reporting.
Configuration options: [False] [True] [Auto]
DDR Bus Configuration
This item allows you to configure DDR Bus Configuration.