Intel S875WP1 Product Guide - Page 106

Interrupts, Server and Windows

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Interrupts The interrupts can be routed through the Advanced Programmable Interrupt Controller (APIC) portion of the ICH5-R component. The APIC is supported in Windows* 2000 Server and Windows XP and supports a total of twenty-four interrupts. Table 47. Interrupts IRQ System Resource NMI I/O channel check 0 Reserved, interval timer 1 Reserved, keyboard buffer full 2 Reserved, cascade interrupt from slave PIC 3 COM2 (Note 1) 4 COM1 (Note 1) 5 LPT2 (Plug and Play option)/User available 6 Diskette drive 7 LPT1 (Note 1) 8 Real-time clock 9 Reserved for ICH5-R system management bus 10 User available 11 User available 12 Onboard mouse port (if present, else user available) 13 Reserved, math coprocessor 14 Primary IDE (if present, else user available) 15 Secondary IDE (if present, else user available) 16 USB UHCI controller 1 (through PIRQA) 17 User available (through PIRQB) 18 ICH5-R USB controller 3 (through PIRQC) 19 ICH5-R USB controller 2 (through PIRQD) 20 ICH5-R LAN (through PIRQE) 21 User available (through PIRQF) 22 User available (through PIRQG) 23 ICH5-R USB 2.0 EHCI controller/User available (through PIRQH) Note: 1. Default, but can be changed to another IRQ. 106 Intel Server Board S875WP1-E Product Guide

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106
Intel Server Board S875WP1-E Product Guide
Interrupts
The interrupts can be routed through the Advanced Programmable Interrupt Controller (APIC)
portion of the ICH5-R component. The APIC is supported in Windows
*
2000 Server and Windows
XP and supports a total of twenty-four interrupts.
Table 47.
Interrupts
IRQ
System Resource
NMI
I/O channel check
0
Reserved, interval timer
1
Reserved, keyboard buffer full
2
Reserved, cascade interrupt from slave PIC
3
COM2
(Note 1)
4
COM1
(Note 1)
5
LPT2 (Plug and Play option)/User available
6
Diskette drive
7
LPT1
(Note 1)
8
Real-time clock
9
Reserved for ICH5-R system management bus
10
User available
11
User available
12
Onboard mouse port (if present, else user available)
13
Reserved, math coprocessor
14
Primary IDE (if present, else user available)
15
Secondary IDE (if present, else user available)
16
USB UHCI controller 1 (through PIRQA)
17
User available (through PIRQB)
18
ICH5-R USB controller 3 (through PIRQC)
19
ICH5-R USB controller 2 (through PIRQD)
20
ICH5-R LAN (through PIRQE)
21
User available (through PIRQF)
22
User available (through PIRQG)
23
ICH5-R USB 2.0 EHCI controller/User available (through PIRQH)
Note:
1.
Default, but can be changed to another IRQ.