Asus PU-DLS PU-DLS User Manual - Page 76

SDRAM RAS Precharge Delay [3T] This item controls the idle clocks after issuing a precharge command to the DDR SDRAM. It is recommended to keep the default setting for stable system operation. SDRAM Active Precharge Delay [6T] This item controls the number of DDR SDRAM clocks used for DDR SDRAM parameters. It is recommended to keep the default setting for stable system operation. Video Memory Cache Mode [UC] USWC (uncacheable, speculative write combining) is a new cache technology for the video memory of the processor. It can greatly improve the display speed by caching the display data. You must set this to UC (uncacheable) if your display card does not support this feature, otherwise the system may not boot. Configuration options: [UC] [USWC] Memory Hole At 15M-16M [Disabled] This field allows you to reserve an address space for ISA expansion cards. Setting the address space to a particular setting makes that memory space unavailable to other system components. Expansion cards can only access memory up to 16MB. Configuration options: [Disabled] [Enabled] Delayed Transaction [Enabled] When set to [Enabled], this feature frees the PCI bus when the CPU is accessing 8-bit LPC, FWH, and ICH3 internal registers. This process normally consumes about 50-60 PCI clocks without PCI delayed transaction. Configuration options: [Enabled] [Disabled] Onboard PCI IDE [Both] This field allows you to enable either the primary IDE channel or secondary IDE channel, or both. You can also set both channels to [Disabled]. Configuration options: [Both] [Primary] [Secondary] [Disabled] 4-18 Chapter 4: BIOS Setup