Fujitsu MHT2030AT Manual/User Guide - Page 81
I/O registers, Logical Interface
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5.2 Logical Interface 5.2.1 I/O registers Communication between the host system and the device is done through inputoutput (I/O) registers of the device. These I/O registers can be selected by the coded signals, CS0-, CS1-, and DA0 to DA2 from the host system. Table 5.2. shows the coding address and the function of I/O registers. Table 5.2 I/O registers CS0- CS1- DA2 DA1 Command block registers L H L L L H L L L H L H L H L H L H H L L H H L L H H H L H H H L L X X Control block registers H L H H H L H H DA0 I/O registers Host I/O Read operation Write operation address L Data Data X'1F0' H Error Register Features X'1F1' L Sector Count Sector Count X'1F2' H Sector Number Sector Number X'1F3' L Cylinder Low Cylinder Low X'1F4' H Cylinder High Cylinder High X'1F5' L Device/Head Device/Head X'1F6' H Status Command X'1F7' X (Invalid) (Invalid) - L Alternate Status Device Control X'3F6' H - - X'3F7' Notes: 1. The Data register for read or write operation can be accessed by 16 bit data bus (DATA0 to DATA15). 2. The registers for read or write operation other than the Data registers can be accessed by 8 bit data bus (DATA0 to DATA7). 3. When reading the Drive Address register, bit 7 is high-impedance state. 4. H indicates signal level High and L indicates signal level Low. There are two methods for specifying the LBA mode. One method is to specify the LBA mode with 28-bit address information, and the other is to specify it with 48-bit address information (command of EXT system). If the LBA mode is specified with 28-bit address information, the Device/Head, Cylinder High, Cylinder Low, Sector Number registers C141-E192-02EN 5-7