Gateway 7400 System Manual (PDF Version) - Page 146

Memory map Address Range (hex) 0 to 07FFFFh 0A0000h to 0BFFFFh 0C0000h and 0DFFFFh Amount 640 KB 128 KB 128 KB 0E0000h to 0FFFFFh 0E0000h to 0EFFFFh FC000000h to FFFFFFFFh 128 KB 2 MB 64 MB Function DOS region, base system memory Video or SMM memory Expansion card BIOS and buffer area System BIOS Extended system BIOS PCI memory space Interrupts The following table suggests a logical interrupt mapping of interrupt sources. It reflects a typical configuration, but you can change these interrupts. Use the information to determine how to program each interrupt. The actual interrupt map is defined using configuration registers in the I/O controller. I/O Redirection Registers in the I/O APIC are provided for each interrupt signal. The signals define hardware interrupt signal characteristics for APIC messages sent to local APIC(s). Important If you disable either IDE controller to free the interrupt for that controller, you must physically unplug the IDE cable from the system board. Simply disabling the drive by configuring the SSU option does not make the interrupt available. Interrupt INTR NMI IRQ1 Cascade IRQ3 IRQ4 I/O APIC Level INT0 N/A INT1 INT2 INT3 INT4 Description Processor interrupt NMI from PIC to processor Keyboard interrupt Interrupt signal from second 8259 Serial port A or B interrupt from SIO device (you can configure either) Serial port A or B interrupt from SIO device (you can configure either) 138 System Specifications