Hitachi HTS541680J9AT00 Specifications - Page 38

Signal definitions - 20

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Travelstar 5K160 (PATA) Hard Disk Drive Specification 7.3 Signal definitions The pin assignments of interface signals are listed as follows: PIN SIGNAL I/O Type PIN 01 RESET- I TTL 02 03 DD07 I/O 3-state 04 05 DD06 I/O 3-state 06 07 DD05 I/O 3-state 08 09 DD04 I/O 3-state 10 11 DD03 I/O 3-state 12 13 DD02 I/O 3-state 14 15 DD01 I/O 3-state 16 17 DD00 I/O 3-state 18 19 GND (20) 21 DMARQ O 3-state 22 23 DIOW-(*) I TTL 24 25 DIOR-(*) I TTL 26 27 IORDY(*) O OD 28 29 DMACK- I TTL 30 31 INTRQ O 3-state 32 33 DA01 I TTL 34 35 DA00 I TTL 36 37 CS0- I TTL 38 39 DASP- I/O OD 40 41 + 5V logic power 42 43 GND 44 Table 22. Signal definition SIGNAL GND DD08 DD09 DD10 DD11 DD12 DD13 DD14 DD15 Key GND GND GND CSEL GND (reserved) PDIAGDA02 CS1GND + 5V motor (reserved) I/O I/O I/O I/O I/O I/O I/O I/O I/O I I/O I I power Type 3-state 3-state 3-state 3-state 3-state 3-state 3-state 3-state TTL OD TTL TTL O designates an output from the drive I designates an input to the drive I/O designates an input/output common OD designates an Open-Drain output power designates a power supply to the drive reserved designates reserved pins which must be left unconnected The signal lines marked with (*) are redefined during the Ultra DMA protocol to provide special functions. These lines change from the conventional to special definitions at the moment the host decides to allow a DMA burst, if the Ultra DMA transfer mode was previously chosen via SetFeatures. The drive becomes aware of this change upon assertion of the DMACK- line. These lines revert back to their original definitions upon the deassertion of DMACK at the termination of the DMA burst. Special Definition (for Ultra DMA) DDMARDY- Write Operation HSTROBE STOP HDMARDY- Read Operation DSTROBE STOP Table 23. Special signal definitions for Ultra DMA Conventional Definition IORDY DIORDIOWDIORIORDY DIOW- 38/188

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Travelstar 5K160 (PATA) Hard Disk Drive Specification
38
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188
7.3
Signal definitions
The pin assignments of interface signals are listed as follows:
PIN
SIGNAL
I/O
Type
PIN
SIGNAL
I/O
Type
01
RESET-
I
TTL
02
GND
03
DD07
I/O
3–state
04
DD08
I/O
3–state
05
DD06
I/O
3–state
06
DD09
I/O
3–state
07
DD05
I/O
3–state
08
DD10
I/O
3–state
09
DD04
I/O
3–state
10
DD11
I/O
3–state
11
DD03
I/O
3–state
12
DD12
I/O
3–state
13
DD02
I/O
3–state
14
DD13
I/O
3–state
15
DD01
I/O
3–state
16
DD14
I/O
3–state
17
DD00
I/O
3–state
18
DD15
I/O
3–state
19
GND
(20)
Key
21
DMARQ
O
3–state
22
GND
23
DIOW-(*)
I
TTL
24
GND
25
DIOR-(*)
I
TTL
26
GND
27
IORDY(*)
O
OD
28
CSEL
I
TTL
29
DMACK-
I
TTL
30
GND
31
INTRQ
O
3–state
32
(reserved)
33
DA01
I
TTL
34
PDIAG-
I/O
OD
35
DA00
I
TTL
36
DA02
I
TTL
37
CS0-
I
TTL
38
CS1-
I
TTL
39
DASP-
I/O
OD
40
GND
41
+ 5V logic
power
42
+ 5V motor
power
43
GND
44
(reserved)
Table 22. Signal definition
O
designates an output from the drive
I
designates an input to the drive
I/O
designates an input/output common
OD
designates an Open-Drain output
power
designates a power supply to the drive
reserved
designates reserved pins which must be left unconnected
The signal lines marked with (*) are redefined during the Ultra DMA protocol to provide special functions. These
lines change from the conventional to special definitions at the moment the host decides to allow a DMA burst, if
the Ultra DMA transfer mode was previously chosen via SetFeatures. The drive becomes aware of this change upon
assertion of the DMACK- line. These lines revert back to their original definitions upon the deassertion of DMACK
at the termination of the DMA burst.
Special Definition
(for Ultra DMA)
Conventional Definition
DDMARDY-
IORDY
HSTROBE
DIOR-
Write Operation
STOP
DIOW-
HDMARDY-
DIOR-
DSTROBE
IORDY
Read Operation
STOP
DIOW-
Table 23. Special signal definitions for Ultra DMA