Intel S1200RP Technical Product Specification - Page 222
Common Mode Noise, Ripple/Noise, Timing Requirements
View all Intel S1200RP manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 222 highlights
Server Board Power Distribution Intel® Server Board S1200V3RP The residual voltage at the power supply outputs for no load condition does not exceed 100mV when AC voltage is applied and the PSON# signal is de-asserted. 13.1.9 Common Mode Noise The Common Mode noise on any output does not exceed 350mV pk-pk over the frequency band of 10Hz to 20MHz. The measurement is made across a 100Ω resistor between each of DC outputs, including ground at the DC power connector and chassis ground (power subsystem enclosure). The test set-up shall use a FET probe such as Tektronix* model P6046 or equivalent. 13.1.10 Ripple/Noise The maximum allowed ripple/noise output of the power supply is defined in below table. This is measured over a bandwidth of 10Hz to 20MHz at the power supply output connectors. A 10µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor is placed at the point of measurement. Table 68. Ripples and Noise +3.3V 50mVp-p +5V +12V 1 50mVp-p 120mVp-p The test set-up shall be as shown below. +12V 2 120mVp-p -12V 200mVp-p +5VSB 50mVp-p VOUT AC HOT POWER SUPPLY AC NEUTRAL VRETURN 10uF .1uF LOAD LOAD MUST BE ISOLATED FROM THE GROUND OF THE POWER SUPPLY AC GROUND GENERAL NOTES: 1. LOAD THE OUTPUT WITH ITS MINIMUM LOAD CURRENT. 2. CONNECT THE PROBES AS SHOWN. 3. REPEAT THE MEASUREMENTS WITH THE MAXIMUM LOAD ON THE OUTPUT. SCOPE SCOPE NOTE: USE A TEKTRONIX 7834 OSCILLOSCOPE WITH 7A13 AND DIFFERENTIAL PROBE P6055 OR EQUIVALENT. Figure 50. Differential Noise test setup Note: When performing this test, the probe clips and capacitors should be located close to the load. 13.1.11 Timing Requirements These are the timing requirements for the power supply operation. The output voltages rise from 10% to within regulation limits (Tvout_rise) within 2 to 50ms, except for 5VSB - it is allowed to rise from 1 to 25ms. The +3.3V, +5V and +12V1, +12V2 output voltages should start to rise approximately at the same time. All outputs must rise monotonically. Each output voltage reach regulation within 50ms (Tvout_on) of each other during turn on the power supply. Each output voltage fall out of regulation within 400ms (Tvout_off) of each other during turn off. The table below 210 Revision 1.0