Intel S1200RP Technical Product Specification - Page 237
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Intel® Server Board S1200V3RP Appendix B: Integrated BMC Sensor Tables Full Sensor Name (Sensor name in SDR) Se Platform ns Applicabilit or y # Sensor Type Event/R eading Type Event Offset Triggers VRD h Temperature (P3 VRD Hot) Processor 4 VRD Temperature (P4 VRD 93 h All Hot) Processor 1 Memory VRD Hot 0-1 94 h All (P1 Mem01 VRD Hot) Processor 1 Memory VRD Hot 2-3 (P1 Mem23 95 h All VRD Hot) Processor 2 Memory VRD Hot 0-1 96 h All (P2 Mem01 VRD Hot) Processor 2 Memory VRD Hot 2-3 97 h All (P2 Mem23 VRD Hot) Processor 3 Memory VRD Hot 0-1 98 h All (P3 Mem01 VRD Hot) Processor 3 Memory VRD Hot 2-3 99 h All (P4 Mem23 VRD Hot) Processor 4 Memory 9 VRD Hot 0-1 A All (P4 Mem01 h VRD Hot) Processor 4 Memory 9 VRD Hot 2-3 B All (P4 Mem23 h VRD Hot) ature 01h Discret e 05h Temper ature 01h Digital Discret e 05h 01 - Limit exceeded Temper ature 01h Digital Discret e 05h 01 - Limit exceeded Temper ature 01h Digital Discret e 05h 01 - Limit exceeded Temper ature 01h Digital Discret e 05h 01 - Limit exceeded Temper ature 01h Digital Discret e 05h 01 - Limit exceeded Temper ature 01h Digital Discret e 05h 01 - Limit exceeded Temper ature 01h Digital Discret e 05h 01 - Limit exceeded Temper ature 01h Digital Discret e 05h 01 - Limit exceeded Temper ature 01h Digital Discret e 05h 01 - Limit exceeded Contrib. Assert Reada Event Rearm St To /De- ble Data an System assert db Status Value/ y Offset s and Offset De Fatal As and - De Trig Offset M - Nonfatal As and - De Trig Offset A - Nonfatal As and - De Trig Offset A - Nonfatal As and - De Trig Offset A - Nonfatal As and - De Trig Offset A - Nonfatal As and - De Trig Offset A - Nonfatal As and - De Trig Offset A - Nonfatal As and - De Trig Offset A - Nonfatal As and - De Trig Offset A - Revision 1.0 225