Intel S1200RP Technical Product Specification - Page 261
Glossary, Revision 1.0
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Intel® Server Board S1200V3RP Glossary Term SDRAM SEL SHA1 SIO SMBus* SMI SMM SMS SNMP SOL SPT SRAM UART UDP UHCI VLAN Definition Synchronous dynamic random access memory System event log Secure Hash Algorithm 1 Server Input/Output A two-wire interface based on the I2C protocol. The SMBus* is a low-speed bus that provides positive addressing for devices and bus arbitration. Server management interrupt. SMI is the highest priority non-maskable interrupt. Server management mode Server management software Simple Network Management Protocol Serial-over-LAN Straight pass-through Static random access memory Universal asynchronous receiver and transmitter User Datagram Protocol Universal Host Controller Interface Virtual local area network Revision 1.0 249