Asus CUR-DLS CUR-DLS User Manual - Page 50
Chip Configuration
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4. BIOS SETUP 4.4.1 Chip Configuration 4. BIOS SETUP Chip Configuration Video Memory Cache Mode [UC] USWC (uncacheable, speculative write combining) is a new cache technology for the video memory of the processor. It can greatly improve the display speed by caching the display data. You must set this to UC (uncacheable) if your display card cannot support this feature; otherwise your system may not boot. Configuration options: [UC] [USWC] Memory Hole At 15M-16M [Disabled] This field allows you to reserve an address space for ISA devices that require it. Configuration options: [Disabled] [Enabled] High Priority PCI Mode [Enabled] This field allows you to give PCI slot 1 a higher priority. You may want to leave on the default setting if you are using an IEEE-1394 PCI card. Configuration options: [Disabled] [Enabled] Onboard PCI IDE Enable [Both] You can select to enable the primary IDE channel, secondary IDE channel, both, or disable both channels. Configuration options: [Both] [Disabled] 50 ASUS CUR-DLS User's Manual