Asus CUR-DLS CUR-DLS User Manual - Page 50

Chip Configuration

Page 50 highlights

4. BIOS SETUP 4.4.1 Chip Configuration 4. BIOS SETUP Chip Configuration Video Memory Cache Mode [UC] USWC (uncacheable, speculative write combining) is a new cache technology for the video memory of the processor. It can greatly improve the display speed by caching the display data. You must set this to UC (uncacheable) if your display card cannot support this feature; otherwise your system may not boot. Configuration options: [UC] [USWC] Memory Hole At 15M-16M [Disabled] This field allows you to reserve an address space for ISA devices that require it. Configuration options: [Disabled] [Enabled] High Priority PCI Mode [Enabled] This field allows you to give PCI slot 1 a higher priority. You may want to leave on the default setting if you are using an IEEE-1394 PCI card. Configuration options: [Disabled] [Enabled] Onboard PCI IDE Enable [Both] You can select to enable the primary IDE channel, secondary IDE channel, both, or disable both channels. Configuration options: [Both] [Disabled] 50 ASUS CUR-DLS User's Manual

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110

ASUS CUR-DLS User’s Manual
50
4. BIOS SETUP
4. BIOS SETUP
4.4.1 Chip Configuration
Chip Configuration
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache technol-
ogy for the video memory of the processor. It can greatly improve the dis-
play speed by caching the display data. You must set this to UC (uncacheable)
if your display card cannot support this feature; otherwise your system may
not boot. Configuration options: [UC] [USWC]
Memory Hole At 15M-16M [Disabled]
This field allows you to reserve an address space for ISA devices that re-
quire it. Configuration options: [Disabled] [Enabled]
High Priority PCI Mode [Enabled]
This field allows you to give PCI slot 1 a higher priority. You may want to
leave on the default setting if you are using an IEEE-1394 PCI card. Con-
figuration options: [Disabled] [Enabled]
Onboard PCI IDE Enable [Both]
You can select to enable the primary IDE channel, secondary IDE channel,
both, or disable both channels. Configuration options: [Both] [Disabled]