Casio QT 6000 Service Manual - Page 61

NO. PIN NAME 110 WE3/ICIOWR 111 VDD 112 VSS 113 SLEEP 114 PCIGNT4 115 PCIGNT3 116 PCIGNT2 117 PCIREQ4 118 PCIREQ3/MD10 119 VDDQ 120 VSSQ 121 PCIREQ2/MD9 122 IDSEL 123 INTA 124 PCIRST 125 PCICLK 126 PCIGNT1/REQOUT 127 PCIREQ1/GNTIN 128 SERR 129 AD31 130 AD30 131 VDDQ 132 VSSQ 133 AD29 134 AD28 135 AD27 136 AD26 137 AD25 138 AD24 139 C/BE3 140 AD23 141 AD22 142 AD21 143 VDDQ 144 VSSQ 145 VDD 146 VSS 147 AD20 148 AD19 149 AD18 150 AD17 151 AD16 152 C/BE2 153 PCIFRAME 154 IRDY 155 TRDY 156 DEVSEL 157 VDDQ 158 VSSQ 159 PCISTOP 160 PCILOCK 161 PERR 162 PAR 163 C/BE1 164 AD15 I/O O Power Power I O O O I* I* Power Power I* I O O I O I I/O I/O I/O Power Power DESCRIPTION D31-D24 select signal Internal VDD Internal GND Sleep Bus grant (host function) Bus grant (host function) Bus grant (host function) Bus request (host function) Bus request (host function)/mode IO VDD IO GND Bus request (host function)/mode Configuration device select Interrupt (async) Reset output PCI input clock Bus grant (host function)/bus request Bus request (host function)/bus grant System error PCI address/data/port PCI address/data/port IO VDD IO GND I/O PCI address/data/port I/O I/O Power Power Power Power Command/byte enable PCI address/data/port IO VDD IO GND Internal VDD Internal GND I/O PCI address/data/port I/O I/O I/O I/O I/O Power Power I/O I/O I/O I/O I/O I/O Command/byte enable Bus cycle Initiator ready Target read Device select IO VDD IO GND Transaction stop Exclusive access Parity error Parity Command/byte enable PCI address/data/port - 59 -