HP Visualize J5000 hp Visualize J5000, J7000 workstations service handbook (a4 - Page 60

PDC_PROC halted CPU

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Troubleshooting Identifying LCD-Indicated Conditions Table 3-1. Chassis Codes for J5000 and J7000 Workstations Ostat TST Code 1nB2 FRU SYS BD FLT 1nBA SYS BD FLT 1nBB SYS BD FLT 1nBF SYS BD INI 1nCA SYS BD WRN 1nCD SYS BD WRN 1nCE SYS BD FLT 1nCF SYS BD WRN 1mDs SYS BD WRN 1nEF SYS BD WRN 1mFs SYS BD INI 1nFC SYS BD INI 1nFD SYS BD FLT 1nFF SYS BD TST 2n20 SYS BD FLT 2n25 SYS BD FLT 2n26 SYS BD TST 2n30 SYS BD TST 2n40 SYS BD TST 2n50 SYS BD FLT 2n51 SYS BD TST 2n70 SYS BD Message CPUn TLB trans monarch CPU fail bad CPUn number CPUn halt boot CPUn sys bus arb CPUn deconfig CPUn extinguish slaven failed slaves deconfig CPUn slftst warn monm stop slaves CPUn sync'ing CPUn stat wd tst monarchn selftst CPUn icache RAM CPUn ic ld d err CPUn ic ld t err CPUn icache tag CPUn icache par CPUn dc stor que CPUn dc st q err CPUn dcache RAM Description CPU n is starting its TLB translation self-test. The monarch CPU failed. The CPU identifier was out of range. Bootstrap failure--machine halted. Monarch CPU is initializing the system bus arbitration. CPU n deconfigured itself. PDC_PROC halted CPU n. Slave CPU n failed self-test. Monarch CPU m deconfigured slave CPU s. CPU n detected a non-fatal error during its self-tests. Monarch CPU m halted slave CPU s. CPU n is synchronizing with the rest of the system. CPU n is testing the system status word. Monarch CPU n failed self-test. CPU n is starting its instruction cache RAM self-test. CPU n detected a data error during data cache load. CPU n detected a tag error during data cache load. CPU n is starting its instruction cache tag self-test. CPU n is starting its instruction cache parity detection self-test. CPU n is starting its data cache store queue self-test. CPU n detected an error during its data cache store queue self-test. CPU n is starting its data cache RAM self-test. 56 Chapter 3

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56
Chapter 3
Troubleshooting
Identifying LCD-Indicated Conditions
TST
1
n
B2
SYS BD
CPU
n
TLB trans
CPU
n
is starting its TLB translation
self-test.
FLT
1
n
BA
SYS BD
monarch CPU fail
The monarch CPU failed.
FLT
1
n
BB
SYS BD
bad CPU
n
number
The CPU identifier was out of range.
FLT
1
n
BF
SYS BD
CPU
n
halt boot
Bootstrap failure--machine halted.
INI
1
n
CA
SYS BD
CPU
n
sys bus arb
Monarch CPU is initializing the system
bus arbitration.
WRN
1
n
CD
SYS BD
CPU
n
deconfig
CPU
n
deconfigured itself.
WRN
1
n
CE
SYS BD
CPU
n
extinguish
PDC_PROC halted CPU
n
.
FLT
1
n
CF
SYS BD
slave
n
failed
Slave CPU
n
failed self-test.
WRN
1
m
D
s
SYS BD
slave
s
deconfig
Monarch CPU
m
deconfigured slave CPU
s
.
WRN
1
n
EF
SYS BD
CPU
n
slftst warn
CPU
n
detected a non-fatal error during
its self-tests.
WRN
1
m
F
s
SYS BD
mon
m
stop slave
s
Monarch CPU
m
halted slave CPU
s
.
INI
1
n
FC
SYS BD
CPU
n
sync’ing
CPU
n
is synchronizing with the rest of
the system.
INI
1
n
FD
SYS BD
CPU
n
stat wd tst
CPU
n
is testing the system status word.
FLT
1
n
FF
SYS BD
monarch
n
selftst
Monarch CPU
n
failed self-test.
TST
2
n
20
SYS BD
CPU
n
icache RAM
CPU
n
is starting its instruction cache
RAM self-test.
FLT
2
n
25
SYS BD
CPU
n
ic ld d err
CPU
n
detected a data error during data
cache load.
FLT
2
n
26
SYS BD
CPU
n
ic ld t err
CPU
n
detected a tag error during data
cache load.
TST
2
n
30
SYS BD
CPU
n
icache tag
CPU
n
is starting its instruction cache tag
self-test.
TST
2
n
40
SYS BD
CPU
n
icache par
CPU
n
is starting its instruction cache
parity detection self-test.
TST
2
n
50
SYS BD
CPU
n
dc stor que
CPU
n
is starting its data cache store
queue self-test.
FLT
2
n
51
SYS BD
CPU
n
dc st q err
CPU
n
detected an error during its data
cache store queue self-test.
TST
2
n
70
SYS BD
CPU
n
dcache RAM
CPU
n
is starting its data cache RAM
self-test.
Table 3-1. Chassis Codes for J5000 and J7000 Workstations
Ostat
Code
FRU
Message
Description