Intel E6600 Specification Update - Page 67

Errata Contributory Exceptions and Page Faults will cause a triple fault shutdown, whereas a benign exception may not. Implication: If a benign exception occurs while attempting to call the double-fault handler, the processor may hang or may handle the benign exception. Intel has not observed this erratum with any commercially available software. Workaround: None identified. Status: For the steppings affected, see the Summary Tables of Changes. AI127. A VM Exit Due to a Fault While Delivering a Software Interrupt May Save Incorrect Data into the VMCS Problem: If a fault occurs during delivery of a software interrupt (INTn) in virtual-8086 mode when virtual mode extensions are in effect and that fault causes a VM exit, incorrect data may be saved into the VMCS. Specifically, information about the software interrupt may not be reported in the IDT-vectoring information field. In addition, the interruptibility-state field may indicate blocking by STI or by MOV SS if such blocking were in effect before execution of the INTn instruction or before execution of the VM-entry instruction that injected the software interrupt. Implication: In general, VMM software that follows the guidelines given in the section "Handling VM Exits Due to Exceptions" of Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide should not be affected. If the erratum improperly causes indication of blocking by STI or by MOV SS, the ability of a VMM to inject an interrupt may be delayed by one instruction. Workaround: VMM software should follow the guidelines given in the section "Handling VM Exits Due to Exceptions" of Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide. Status: For the steppings affected, see the Summary Tables of Changes. AI128. A VM Exit Occuring in IA-32e Mode May Not Produce a VMX Abort When Expected Problem: If a VM exit occurs while the processor is in IA-32e mode and the "host address-space size" VM-exit control is 0, a VMX abort should occur. Due to this erratum, the expected VMX aborts may not occur and instead the VM Exit will occur normally. The conditions required to observe this erratum are a VM entry that returns from SMM with the "IA-32e guest" VM-entry control set to 1 in the SMM VMCS and the "host address-space size" VM-exit control cleared to 0 in the executive VMCS. Implication: A VM Exit will occur when a VMX Abort was expected. Workaround: An SMM VMM should always set the "IA-32e guest" VM-entry control in the SMM VMCS to be the value that was in the LMA bit (IA32_EFER.LMA.LMA[bit 10]) in the IA32_EFER MSR (C0000080H) at the time of the last SMM VM Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 67 Specification Update