Intel Q9400S Data Sheet - Page 24
VSS_SENSE lands. Voltage regulation feedback for voltage regulator circuits must be taken
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Electrical Specifications Figure 2-1. VCC Static and Transient Tolerance 0 VID - 0.000 VID - 0.013 VID - 0.025 VID - 0.038 VID - 0.050 VID - 0.063 VID - 0.075 VID - 0.088 VID - 0.100 VID - 0.113 VID - 0.125 VID - 0.138 VID - 0.150 VID - 0.163 VID - 0.175 VID - 0.188 VID - 0.200 VID - 0.213 VID - 0.225 Icc [A] 10 20 30 40 50 60 70 80 90 100 110 120 Vcc Maximum Vcc Typical Vcc Minimum Vcc [V] NOTES: 1. The loadline specification includes both static and transient limits except for overshoot allowed as shown in Section 2.6.3. 2. This loadline specification shows the deviation from the VID set point. 3. The loadlines specify voltage limits at the die measured at the VCC_SENSE and VSS_SENSE lands. Voltage regulation feedback for voltage regulator circuits must be taken from processor VCC and VSS lands. Refer to the Voltage Regulator Design Guide for socket loadline guidelines and VR implementation details. 24 Datasheet