Intel Q9400S Data Sheet - Page 62

Datasheet, Power/Other, PWRGOOD, Input, IGNNE, Asynch CMOS, RESERVED, DPSLP, Source Synch, Input/

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Land Listing and Signal Descriptions Table 4-2. Numerical Land Assignment Land # Land Name Signal Buffer Type Direction M25 M26 M27 M28 M29 M30 N1 N2 N3 N4 N5 N6 N7 N8 N23 N24 N25 N26 N27 N28 N29 N30 P1 P2 P3 P4 P5 P6 P7 P8 P23 P24 P25 P26 P27 P28 P29 P30 R1 R2 R3 R4 R5 R6 R7 R8 VCC Power/Other VCC Power/Other VCC Power/Other VCC Power/Other VCC Power/Other VCC Power/Other PWRGOOD Power/Other IGNNE# Asynch CMOS VSS Power/Other RESERVED RESERVED VSS Power/Other VSS Power/Other VCC Power/Other VCC Power/Other VCC Power/Other VCC Power/Other VCC Power/Other VCC Power/Other VCC Power/Other VCC Power/Other VCC Power/Other DPSLP# Asynch CMOS SMI# Asynch CMOS INIT# Asynch CMOS VSS Power/Other RESERVED A04# Source Synch VSS Power/Other VCC Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other COMP3 Power/Other VSS Power/Other FERR#/PBE# Asynch CMOS A08# Source Synch VSS Power/Other ADSTB0# Source Synch VSS Power/Other VCC Power/Other Input Input Input Input Input Input/Output Input Output Input/Output Input/Output Table 4-2. Numerical Land Assignment Land # Land Name Signal Buffer Type Direction R23 R24 R25 R26 R27 R28 R29 R30 T1 T2 T3 T4 T5 T6 T7 T8 T23 T24 T25 T26 T27 T28 T29 T30 U1 U2 U3 U4 U5 U6 U7 U8 U23 U24 U25 U26 U27 U28 U29 U30 V1 V2 V3 V4 V5 V6 VSS VSS VSS VSS VSS VSS VSS VSS COMP1 DPRSTP# VSS A11# A09# VSS VSS VCC VCC VCC VCC VCC VCC VCC VCC VCC TDO_M FC29 FC30 A13# A12# A10# VSS VCC VCC VCC VCC VCC VCC VCC VCC VCC MSID1 RESERVED VSS A15# A14# VSS Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Input Asynch CMOS Input Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other TAP Output Power/Other Power/Other Source Synch Input/Output Source Synch Input/Output Source Synch Input/Output Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Output Power/Other Source Synch Source Synch Power/Other Input/Output Input/Output 62 Datasheet

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Land Listing and Signal Descriptions
62
Datasheet
M25
VCC
Power/Other
M26
VCC
Power/Other
M27
VCC
Power/Other
M28
VCC
Power/Other
M29
VCC
Power/Other
M30
VCC
Power/Other
N1
PWRGOOD
Power/Other
Input
N2
IGNNE#
Asynch CMOS
Input
N3
VSS
Power/Other
N4
RESERVED
N5
RESERVED
N6
VSS
Power/Other
N7
VSS
Power/Other
N8
VCC
Power/Other
N23
VCC
Power/Other
N24
VCC
Power/Other
N25
VCC
Power/Other
N26
VCC
Power/Other
N27
VCC
Power/Other
N28
VCC
Power/Other
N29
VCC
Power/Other
N30
VCC
Power/Other
P1
DPSLP#
Asynch CMOS
Input
P2
SMI#
Asynch CMOS
Input
P3
INIT#
Asynch CMOS
Input
P4
VSS
Power/Other
P5
RESERVED
P6
A04#
Source Synch
Input/Output
P7
VSS
Power/Other
P8
VCC
Power/Other
P23
VSS
Power/Other
P24
VSS
Power/Other
P25
VSS
Power/Other
P26
VSS
Power/Other
P27
VSS
Power/Other
P28
VSS
Power/Other
P29
VSS
Power/Other
P30
VSS
Power/Other
R1
COMP3
Power/Other
Input
R2
VSS
Power/Other
R3
FERR#/PBE#
Asynch CMOS
Output
R4
A08#
Source Synch
Input/Output
R5
VSS
Power/Other
R6
ADSTB0#
Source Synch
Input/Output
R7
VSS
Power/Other
R8
VCC
Power/Other
Table 4-2.
Numerical Land
Assignment
Land
#
Land Name
Signal Buffer
Type
Direction
R23
VSS
Power/Other
R24
VSS
Power/Other
R25
VSS
Power/Other
R26
VSS
Power/Other
R27
VSS
Power/Other
R28
VSS
Power/Other
R29
VSS
Power/Other
R30
VSS
Power/Other
T1
COMP1
Power/Other
Input
T2
DPRSTP#
Asynch CMOS
Input
T3
VSS
Power/Other
T4
A11#
Source Synch
Input/Output
T5
A09#
Source Synch
Input/Output
T6
VSS
Power/Other
T7
VSS
Power/Other
T8
VCC
Power/Other
T23
VCC
Power/Other
T24
VCC
Power/Other
T25
VCC
Power/Other
T26
VCC
Power/Other
T27
VCC
Power/Other
T28
VCC
Power/Other
T29
VCC
Power/Other
T30
VCC
Power/Other
U1
TDO_M
TAP
Output
U2
FC29
Power/Other
U3
FC30
Power/Other
U4
A13#
Source Synch
Input/Output
U5
A12#
Source Synch
Input/Output
U6
A10#
Source Synch
Input/Output
U7
VSS
Power/Other
U8
VCC
Power/Other
U23
VCC
Power/Other
U24
VCC
Power/Other
U25
VCC
Power/Other
U26
VCC
Power/Other
U27
VCC
Power/Other
U28
VCC
Power/Other
U29
VCC
Power/Other
U30
VCC
Power/Other
V1
MSID1
Power/Other
Output
V2
RESERVED
V3
VSS
Power/Other
V4
A15#
Source Synch
Input/Output
V5
A14#
Source Synch
Input/Output
V6
VSS
Power/Other
Table 4-2.
Numerical Land
Assignment
Land
#
Land Name
Signal Buffer
Type
Direction