Intel Q9400S Data Sheet - Page 58

Common Clock

Page 58 highlights

Land Listing and Signal Descriptions Table 4-2. Numerical Land Assignment Land # Land Name Signal Buffer Type AM2 VID0 Asynch CMOS AM3 VID2 Asynch CMOS AM4 VSS Power/Other AM5 VID6 Asynch CMOS AM6 FC40 Power/Other AM7 VID7 Asynch CMOS AM8 VCC Power/Other AM9 VCC Power/Other AM10 VSS Power/Other AM11 VCC Power/Other AM12 VCC Power/Other AM13 VSS Power/Other AM14 VCC Power/Other AM15 VCC Power/Other AM16 VSS Power/Other AM17 VSS Power/Other AM18 VCC Power/Other AM19 VCC Power/Other AM20 VSS Power/Other AM21 VCC Power/Other AM22 VCC Power/Other AM23 VSS Power/Other AM24 VSS Power/Other AM25 VCC Power/Other AM26 VCC Power/Other AM27 VSS Power/Other AM28 VSS Power/Other AM29 VCC Power/Other AM30 VCC Power/Other AN1 VSS Power/Other AN2 VSS Power/Other AN3 VCC_SENSE Power/Other AN4 VSS_SENSE Power/Other AN5 VCC_MB_ REGULATION Power/Other AN6 VSS_MB_ REGULATION Power/Other AN7 VID_SELECT Power/Other AN8 VCC Power/Other AN9 VCC Power/Other AN10 VSS Power/Other AN11 VCC Power/Other AN12 VCC Power/Other AN13 VSS Power/Other AN14 VCC Power/Other AN15 VCC Power/Other AN16 VSS Power/Other Direction Output Output Output Output Output Output Output Output Output Table 4-2. Numerical Land Assignment Land # Land Name Signal Buffer Type Direction AN17 AN18 AN19 AN20 AN21 AN22 AN23 AN24 AN25 AN26 AN27 AN28 AN29 AN30 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 B1 B10 B11 VSS VCC VCC VSS VCC VCC VSS VSS VCC VCC VSS VSS VCC VCC VSS RS2# D02# D04# VSS D07# DBI0# VSS D08# D09# VSS COMP0 D50# VSS DSTBN3# D56# VSS D61# RESERVED VSS D62# VCCA FC23 VTT VTT VTT VTT VTT VTT VSS D10# VSS Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Common Clock Input Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Power/Other Input Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Power/Other Source Synch Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Source Synch Power/Other Input/Output Input/Output 58 Datasheet

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104

Land Listing and Signal Descriptions
58
Datasheet
AM2
VID0
Asynch CMOS
Output
AM3
VID2
Asynch CMOS
Output
AM4
VSS
Power/Other
AM5
VID6
Asynch CMOS
Output
AM6
FC40
Power/Other
AM7
VID7
Asynch CMOS
Output
AM8
VCC
Power/Other
AM9
VCC
Power/Other
AM10
VSS
Power/Other
AM11
VCC
Power/Other
AM12
VCC
Power/Other
AM13
VSS
Power/Other
AM14
VCC
Power/Other
AM15
VCC
Power/Other
AM16
VSS
Power/Other
AM17
VSS
Power/Other
AM18
VCC
Power/Other
AM19
VCC
Power/Other
AM20
VSS
Power/Other
AM21
VCC
Power/Other
AM22
VCC
Power/Other
AM23
VSS
Power/Other
AM24
VSS
Power/Other
AM25
VCC
Power/Other
AM26
VCC
Power/Other
AM27
VSS
Power/Other
AM28
VSS
Power/Other
AM29
VCC
Power/Other
AM30
VCC
Power/Other
AN1
VSS
Power/Other
AN2
VSS
Power/Other
AN3
VCC_SENSE
Power/Other
Output
AN4
VSS_SENSE
Power/Other
Output
AN5
VCC_MB_
REGULATION
Power/Other
Output
AN6
VSS_MB_
REGULATION
Power/Other
Output
AN7
VID_SELECT
Power/Other
Output
AN8
VCC
Power/Other
AN9
VCC
Power/Other
AN10
VSS
Power/Other
AN11
VCC
Power/Other
AN12
VCC
Power/Other
AN13
VSS
Power/Other
AN14
VCC
Power/Other
AN15
VCC
Power/Other
AN16
VSS
Power/Other
Table 4-2.
Numerical Land
Assignment
Land
#
Land Name
Signal Buffer
Type
Direction
AN17
VSS
Power/Other
AN18
VCC
Power/Other
AN19
VCC
Power/Other
AN20
VSS
Power/Other
AN21
VCC
Power/Other
AN22
VCC
Power/Other
AN23
VSS
Power/Other
AN24
VSS
Power/Other
AN25
VCC
Power/Other
AN26
VCC
Power/Other
AN27
VSS
Power/Other
AN28
VSS
Power/Other
AN29
VCC
Power/Other
AN30
VCC
Power/Other
A2
VSS
Power/Other
A3
RS2#
Common Clock
Input
A4
D02#
Source Synch
Input/Output
A5
D04#
Source Synch
Input/Output
A6
VSS
Power/Other
A7
D07#
Source Synch
Input/Output
A8
DBI0#
Source Synch
Input/Output
A9
VSS
Power/Other
A10
D08#
Source Synch
Input/Output
A11
D09#
Source Synch
Input/Output
A12
VSS
Power/Other
A13
COMP0
Power/Other
Input
A14
D50#
Source Synch
Input/Output
A15
VSS
Power/Other
A16
DSTBN3#
Source Synch
Input/Output
A17
D56#
Source Synch
Input/Output
A18
VSS
Power/Other
A19
D61#
Source Synch
Input/Output
A20
RESERVED
A21
VSS
Power/Other
A22
D62#
Source Synch
Input/Output
A23
VCCA
Power/Other
A24
FC23
Power/Other
A25
VTT
Power/Other
A26
VTT
Power/Other
A27
VTT
Power/Other
A28
VTT
Power/Other
A29
VTT
Power/Other
A30
VTT
Power/Other
B1
VSS
Power/Other
B10
D10#
Source Synch
Input/Output
B11
VSS
Power/Other
Table 4-2.
Numerical Land
Assignment
Land
#
Land Name
Signal Buffer
Type
Direction