Intel S5500BC User Guide - Page 73
Table 8. Diagnostic LED POST Code Decoder
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Memory 0x22h X 0x23h X 0x24h X 0x25h X 0x26h X 0x27h X 0x28h X Table 8. Diagnostic LED POST Code Decoder X O X X O X X O X X O X X O X X O X X O X X X O X Reading configuration data from memory (SPD on FBDIMM) X X O O Detecting presence of memory X O X X Programming timing parameters in the memory controller X O X O Configuring memory parameters in the memory controller X O O X Optimizing memory controller settings X O O O Initializing memory, such as ECC init O X X X Testing memory Intel® Server Board S5500BC User's Guide 53
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Intel
®
Server Board S5500BC User’s Guide
53
Memory
0x22h
X
X
O
X
X
X
O
X
Reading configuration
data from memory (SPD
on FBDIMM)
0x23h
X
X
O
X
X
X
O
O
Detecting presence of
memory
0x24h
X
X
O
X
X
O
X
X
Programming timing
parameters in the memory
controller
0x25h
X
X
O
X
X
O
X
O
Configuring memory
parameters in the memory
controller
0x26h
X
X
O
X
X
O
O
X
Optimizing memory
controller settings
0x27h
X
X
O
X
X
O
O
O
Initializing memory, such
as ECC init
0x28h
X
X
O
X
O
X
X
X
Testing memory
Table 8. Diagnostic LED POST Code Decoder