Compaq ProLiant 1000 PCI Bus Numbering in a Microsoft Windows NT Environment - Page 9

PCI Bus Numbering in a Microsoft Windows NT Environment 9 IMPORTANT: PCI Bus numbers are assigned in "device detection order," not by slot numbering. Bus numbers are assigned during bus initialization according to predefined hardware designators. Dual-Peer PCI Bus - The Compaq ProLiant ML350 server, an example of the dual-peer PCI architecture, begins the PCI BIOS discovery process at the Host Bus. When it detects the primary bus, it assigns bus 0 to it. The bus numbers may not appear to The PCI BIOS then looks for PCI controllers in slots on the Primary Bus. follow a set increment and some PCI controllers detected without bridged PCI buses are assigned bus 0, numbers may be skipped. However, by this method, these hardware designators prevent overlays in bus numbering from occurring. the number of the bus in which it is seated. However, if the PCI Bios detects a bridged PCI device, it increments the bus number to 1 and assigns that bus number to the PCI bus detected on the bridged controller. (The next PCI bus detected is assigned a bus number according to the hardware designation for that system). This discovery process continues until all PCI controllers and controllers with bridged buses on the Primary Bus are detected. The PCI BIOS then continues the discovery process on the Secondary Bus until all PCI buses are detected. The diagram in Table 3 shows an example of the discovery process. Table 3 does not represent all the PCI slots and bus assignment possibilities, it depicts snapshot of what occurs when controllers are loaded in the server. Table 3. Example of PCI bus number detection order for the ProLiant ML350 (a dual-peer system) ProLiant ML350 PCI Server Architecture PCI BIOS Discovery Process ! Host Bus " Primary PCI Bus ! Slot 1 - Server Feature Card ! Slot 4 - Empty ! Slot 5 - Empty ! Slot 6 - NC3131 Fast Ethernet NIC " Secondary PCI Bus ! Slot 2 - Smart Array 5300 Controller ! Slot 3 - Empty End of bus discovery Controller Bus Detection Order Bus Number Assignment First 0 Second 0 Third 0 Fourth 0 Fifth 1 Sixth 5 Seventh 5 Eighth 5 As indicated in Table 3, the order of detection on the ProLiant ML350 server is Primary Host-toPCI Bridge, followed by PCI controllers and bridged controllers on the Primary Bus in slots beginning at 1, skipping 2-3, and ending at 6. The bus discovery process continues with the Secondary Host-to-PCI Bridge, followed by PCI controllers and bridged controllers in slots beginning at 2 and ending at 3. Highly Parallel PCI Bus - The Compaq ProLiant ML530 provides an example of highly parallel PCI architecture. This architecture uses dual memory controllers, dual-peer-PCI buses to deliver optimized multiprocessing support to deliver increased system throughput, and increased system performance when compared to traditional x86-based designs. 13UK-1200A-WWEN