IBM IC35L020 Hard Drive Specifications - Page 81

Registers, Command block registers, Addresses, Functions

Page 81 highlights

12.0 Registers Addresses CS0- CS1- DA2 DA1 DA0 NNXX X Addresses NA 0 X X NA1 0 X NA1 1 0 NA1 1 1 Addresses AN0 0 0 AN0 0 1 AN0 1 0 AN0 1 1 AN0 1 1 AN1 0 0 AN1 0 0 AN1 0 1 AN1 0 1 AN1 1 0 AN1 1 0 AN1 1 1 AAXX X Functions READ (DIOR-) Data bus high impedance1 WRITE (DIOW-) Not used Control block registers Data bus high impedance1 Data bus high impedance1 Not used Not used Alternate Status Device Control Device Address Not used Command block registers Data Error Register Sector Count Sector Number 2 LBA bits 0-7 Cylinder Low 2 LBA bits 8-15 Cylinder High 2 LBA bits 16-23 Device/Head. 2 LBA bits 24-27 Status Data Features Sector Count Sector Number 2 LBA bits 0-7 Cylinder Low 2 LBA bits 8-15 Cylinder High 2 LBA bits 16-23 Device/Head 2 LBA bits 24-27 Command Invalid address Invalid address 1 "imped" means "impedance". 2 Mapping of registers in LBA mode Logic conventions: A = signal asserted N = signal negated X = does not matter which signal is asserted Figure 58. Register Set Communication to or from the device is through an I/ O Register that routes the input or output data to or from registers addressed by the signals from the host (CS0-, CS1-, DA2, DA1, DA0, DIOR- and DIOW-). The Command Block Registers are used for sending commands to the device or posting status from the device. The Control Block Registers are used for device control and to post alternate status. Deskstar 60 GXP Hard disk drive specification 67

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12.0
Registers
Invalid address
Invalid address
X
X
X
A
A
Command
Status
1
1
1
N
A
2
LBA bits 24–27
2
LBA bits 24–27
0
1
1
N
A
Device/Head
Device/Head.
0
1
1
N
A
2
LBA bits 16–23
2
LBA bits 16–23
1
0
1
N
A
Cylinder High
Cylinder High
1
0
1
N
A
2
LBA bits 8–15
2
LBA bits 8–15
0
0
1
N
A
Cylinder Low
Cylinder Low
0
0
1
N
A
2
LBA bits 0–7
2
LBA bits 0–7
1
1
0
N
A
Sector Number
Sector Number
1
1
0
N
A
Sector Count
Sector Count
0
1
0
N
A
Features
Error Register
1
0
0
N
A
Data
Data
0
0
0
N
A
Command block registers
Addresses
Not used
Device Address
1
1
1
A
N
Device Control
Alternate Status
0
1
1
A
N
Not used
Data bus high impedance
1
X
0
1
A
N
Not used
Data bus high impedance
1
X
X
0
A
N
Control block registers
Addresses
Not used
Data bus high impedance
1
X
X
X
N
N
WRITE (DIOW–)
READ (DIOR–)
DA0
DA1
DA2
CS1–
CS0–
Functions
Addresses
1
"imped" means "impedance".
2
Mapping of registers in LBA mode
X = does not matter which signal is asserted
N = signal negated
A = signal asserted
Logic conventions:
Figure 58. Register Set
Communication to or from the device is through an I/ O Register that routes the input or output data to or
from registers addressed by the signals from the host (CS0
, CS1
, DA2, DA1, DA0, DIOR
and
DIOW
).
The Command Block Registers are used for sending commands to the device or posting status from the
device.
The Control Block Registers are used for device control and to post alternate status.
Deskstar
60 GXP Hard disk drive specification
67