Home » Intel Manuals » Processors » Intel E2160 » Manual Viewer

Intel E2160 Design Guide - Page 41

Board and System Implementation of Intel® QST, Intel®, Intel® GMCH

UPC - 735858199216

Add to My Manuals
Save this manual to your list of manuals

Page 41 highlights

Intel® Quiet System Technology (Intel® QST)-Intel® CoreTM 2 Duo E6400, E4300, and Intel® Pentium® Dual-Core E2160 Processor 6.2 Board and System Implementation of Intel® QST Figure 15. To implement, the board must be configured as shown in Figure 15 and listed below: • ME system (S0-S1) with Controller Link connected and powered • DRAM with Channel A DIMM 0 installed and 2MB reserved for Intel® QST FW execution • SPI Flash with sufficient space for the Intel® QST Firmware • SST-based thermal sensors to provide board thermal data for Intel® QST algorithms • Intel® QST firmware Intel® QST Platform Requirements Processor Intel® (G)MCH MMEE DRAM DRAM Intel® ICH8 Controller Link FSC Control SPI SPI Flash Note: SST Sensor Simple Serial Transport (SST) is a single wire bus that is included in the ICH8 to provide additional thermal and voltage sensing capability to the Manageability Engine (ME). Figure 16 shows the major connections for a typical implementation that can support processors with Digital thermal sensor or a thermal diode. In this configuration, a SST Thermal Sensor has been added to read the on-die thermal diode that is in all of the processors in the 775-land LGA packages shipped before the Intel® Core™2 Duo processor. With the proper configuration information, the ME can be accommodate inputs from PECI or SST for the processor socket. Additional SST sensors can be added to monitor system thermal conditions (refer to Appendix E for BTX recommendations for placement). October 2007 Order Number: 315279 -003US Intel® CoreTM 2 Duo E6400, E4300, and Intel® Pentium® Dual-Core E2160 Processor TDG 41

Section	Page
Intel® CoreTM 2 Duo E6400, E4300, and Intel® Pentium® Dual-Core E2160 Processor: Thermal Design Guide	1
Contents	3
Figures	5
Tables	5
Revision History	6
1.0 Introduction	7
1.1 Document Goals and Scope	7
1.1.1 Importance of Thermal Management	7
1.1.2 Document Goals	7
1.1.3 Document Scope	7
1.2 References	9
1.3 Definition of Terms	9
2.0 Processor Thermal/Mechanical Information	11
2.1 Mechanical Requirements	11
2.1.1 Processor Package	11
2.1.2 Heatsink Attach	12
2.2 Thermal Requirements	14
2.2.1 Processor Case Temperature	14
2.2.2 Thermal Profile	15
2.2.3 Tcontrol	16
2.3 Heatsink Design Considerations	17
2.3.1 Heatsink Size	17
2.3.2 Heatsink Mass	18
2.3.3 Package IHS Flatness	18
2.3.4 Thermal Interface Material	18
2.4 System Thermal Solution Considerations	19
2.4.1 Chassis Thermal Design Capabilities	19
2.4.2 Improving Chassis Thermal Performance	19
2.4.3 Summary	19
2.5 System Integration Considerations	20
3.0 Thermal Metrology	21
3.1 Characterizing Cooling Performance Requirements	21
3.1.1 Example	22
3.2 Processor Thermal Solution Performance Assessment	23
3.3 Local Ambient Temperature Measurement Guidelines	23
3.4 Processor Case Temperature Measurement Guidelines	25
4.0 Thermal Management Logic and Thermal Monitor Feature	26
4.1 Processor Power Dissipation	26
4.2 Thermal Monitor Implementation	26
4.2.1 PROCHOT# Signal	27
4.2.2 Thermal Control Circuit	27
4.2.3 Thermal Monitor 2	28
4.2.4 Operation and Configuration	29
4.2.5 On-Demand Mode	30
4.2.6 System Considerations	30
4.2.7 Operating System and Application Software Considerations	31
4.2.8 THERMTRIP# Signal	31
4.2.9 Cooling System Failure Warning	31
4.2.10 Digital Thermal Sensor	31
4.2.11 Platform Environmental Control Interface (PECI)	32
5.0 Intel® Reference Thermal Solution	33
5.1 Thermal Solution Requirements	33
5.2 PICMG 1.3 Form Factor	34
5.3 ATX/BTX form factors	36
5.4 Altitude	36
5.5 Geometric Envelope for Intel Reference PICMG 1.3 Thermal Mechanical Design	37
6.0 Intel® Quiet System Technology (Intel® QST)	38
6.1 Intel® QST Algorithm	38
6.1.1 Output Weighting Matrix	39
6.1.2 Proportional-Integral-Derivative (PID)	39
6.2 Board and System Implementation of Intel® QST	41
6.3 Intel® QST Configuration and Tuning	43
6.4 Fan Hub Thermistor and Intel® QST	43
Appendix A LGA775 Socket Heatsink Loading	44
A.1 LGA775 Socket Heatsink Considerations	44
A.2 Metric for Heatsink Preload for Designs Non-Compliant with Intel Reference Design	44
A.2.1 Heatsink Preload Requirement Limitations	44
A.2.2 Motherboard Deflection Metric Definition	45
A.2.3 Board Deflection Limits	46
A.2.4 Board Deflection Metric Implementation Example	47
A.2.5 Additional Considerations	48
A.3 Heatsink Selection Guidelines	49
Appendix B Thermal Interface Management	50
B.1 Bond Line Management	50
B.2 Interface Material Area	50
B.3 Interface Material Performance	50
Appendix C Case Temperature Reference Metrology	51
C.1 Objective and Scope	51
Appendix D Mechanical Drawings	52