Intel D845PEBT2 Product Specification - Page 111

Chipset Configuration Submenu

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BIOS Setup Program 4.4.9 Chipset Configuration Submenu To access this menu, select Advanced on the menu bar and then Chipset Configuration. Maintenance Main Advanced Security Power PCI Configuration Boot Configuration Peripheral Configuration IDE Configuration Diskette Configuration Event Log Configuration Video Configuration USB Configuration Chipset Configuration Fan Control Configuration Boot Exit The submenu represented in Table 78 is for configuring chipset options. Table 78. Chipset Configuration Submenu Feature ISA Enable Bit PCI Latency Timer Extended Configuration SDRAM Frequency (Note 1) SDRAM Timing Control (Note 1) Options Description • Disabled • Enabled (default) When set to Enable, a PCI-to-PCI bridge will only recognize I/O addresses that do not alias to an ISA range (within the bridge's assigned I/O range). • 32 (default) • 64 • 96 Allows you to control the time (in PCI bus clock cycles) that an agent on the PC bus can hold the bus when another agent has requested the bus. • 128 • 160 • 192 • 224 • 248 • Default (default) Allows the setting of extended configuration options. • User Defined • Auto (default) Allows override of the detected memory frequency. • 266 MHz • 333 MHz (Note 2) NOTE: If SDRAM Frequency is changed, you must reboot for the change to take effect. After changing this setting and rebooting, the System Memory Speed parameter in the Main menu will reflect the new value. • Auto (default) • Manual - Aggressive • Manual - User Defined Auto = Timings will be programmed according to the memory detected. Manual - Aggressive = Selects most aggressive user-defined timings. Manual - User Defined = Allows manual override of detected SDRAM settings. Notes: 1. This feature is displayed only if Extended Configuration is set to User Defined. 2. This option is displayed only if the installed processor has a 533 MHz system bus. continued 111

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BIOS Setup Program
111
4.4.9
Chipset Configuration Submenu
To access this menu, select Advanced on the menu bar and then Chipset Configuration.
Maintenance
Main
Advanced
Security
Power
Boot
Exit
PCI Configuration
Boot Configuration
Peripheral Configuration
IDE Configuration
Diskette Configuration
Event Log Configuration
Video Configuration
USB Configuration
Chipset Configuration
Fan Control Configuration
The submenu represented in Table 78 is for configuring chipset options.
Table 78.
Chipset Configuration Submenu
Feature
Options
Description
ISA Enable Bit
•
Disabled
•
Enabled (default)
When set to
Enable
, a PCI-to-PCI bridge will only
recognize I/O addresses that do not alias to an ISA
range (within the bridge
’
s assigned I/O range).
PCI Latency Timer
•
32
(default)
•
64
•
96
•
128
•
160
•
192
•
224
•
248
Allows you to control the time (in PCI bus clock
cycles) that an agent on the PC bus can hold the bus
when another agent has requested the bus.
Extended Configuration
•
Default (default)
•
User Defined
Allows the setting of extended configuration options.
SDRAM Frequency
(Note 1)
•
Auto (default)
•
266 MHz
•
333 MHz
(Note 2)
Allows override of the detected memory frequency.
NOTE:
If SDRAM Frequency is changed, you must
reboot for the change to take effect.
After changing
this setting and rebooting, the System Memory
Speed parameter in the Main menu will reflect the
new value.
SDRAM Timing Control
(Note 1)
•
Auto (default)
•
Manual
–
Aggressive
•
Manual
–
User Defined
Auto
= Timings will be programmed according to the
memory detected.
Manual
–
Aggressive
= Selects most aggressive
user-defined timings.
Manual
–
User Defined
= Allows manual override of
detected SDRAM settings.
Notes:
1.
This feature is displayed only if Extended Configuration is set to User Defined.
2.
This option is displayed only if the installed processor has a 533 MHz system bus.
continued