Intel D845PEBT2 Product Specification - Page 18

Table 3., Specifications - bios read only

Page 18 highlights

Intel Desktop Board D845PEBT2 Technical Product Specification Table 3. Specifications (continued) Reference Name DDR SDRAM EHCI EPP Specification Title Double Data Rate (DDR) SDRAM Specification Design Specification for a 184 Pin DDR Unbuffered DIMM Intel ® JEDEC DDR 200/266 Unbuffered DIMM Specification Addendum Enhanced Host Controller Interface Specification for Universal Serial Bus IEEE Std 1284.1-1997 (Enhanced Parallel Port) Version, Revision Date and Ownership Version 2.0, May 2002, JEDEC Solid State Technology Association. Revision 1.0, October 2001, JEDEC Solid State Technology Association. Revision 0.9, September 27, 2001, Intel Corporation. Revision 1.0, March 12, 2002, Intel Corporation. Version 1.7, 1997, Institute of Electrical and Electronic Engineers. El Torito Front Panel LPC OHCI PCI Plug and Play Bootable CD-ROM Format Specification Front Panel I/O Connectivity Design Guide Low Pin Count Interface Specification OpenHCI - Open Host Controller Interface Specification for USB PCI Local Bus Specification PCI Bus Power Management Interface Specification Plug and Play BIOS Specification Version 1.0, January 25, 1995, Phoenix Technologies Limited and International Business Machines Corporation. Version 1.0, October 2000, Intel Corporation. Revision 1.0, September 29, 1997, Intel Corporation. Release 1.0a, October 10, 1996, Compaq computer Corp., Microsoft Corporation, and National Semiconductor Corp. Revision 2.2, December 18, 1998, PCI Special Interest Group. Revision 1.1, December 18, 1998, PCI Special Interest Group. Version 1.0a, May 5, 1994, Compaq Computer Corporation, Phoenix Technologies Limited, and Intel Corporation. The information is available from... http://www.jedec.org/ http://www.jedec.org/ http://developer.intel.com/ technology/memory/ index.htm http://developer.intel.com/ technology/usb/download/ ehci-r10.pdf http://standards.ieee.org/ reading/ieee/std_public/ description/busarch/ 1284.1-1997_desc.html http://www.phoenix.com/en/ support/download/ product+documentation/ platform_system_ software.htm http://www.formfactors.org/ formfactors/ front_panel_io.htm http://www.intel.com/ design/chipsets/industry/ lpc.htm http://www.usb.org/ developers/docs.html http://www.pcisig.com/ specifications http://www.pcisig.com/ specifications http://www.microsoft.com/ hwdev/tech/PnP/ default.asp continued 18

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128

Intel Desktop Board D845PEBT2 Technical Product Specification
18
Table 3.
Specifications
(continued)
Reference
Name
Specification
Title
Version, Revision Date and
Ownership
The information is
available from
DDR
SDRAM
Double Data Rate (DDR)
SDRAM Specification
Version 2.0,
May 2002,
JEDEC Solid State Technology
Association.
Design Specification for
a 184 Pin DDR
Unbuffered DIMM
Revision 1.0,
October 2001,
JEDEC Solid State Technology
Association.
Intel
®
JEDEC DDR
200/266 Unbuffered
DIMM Specification
Addendum
Revision 0.9,
September 27, 2001,
Intel Corporation.
technology/memory/
index.htm
EHCI
Enhanced Host
Controller Interface
Specification for
Universal Serial Bus
Revision 1.0,
March 12, 2002,
Intel Corporation.
technology/usb/download/
ehci-r10.pdf
EPP
IEEE Std 1284.1-1997
(Enhanced Parallel Port)
Version 1.7, 1997,
Institute of Electrical and
Electronic Engineers.
reading/ieee/std_public/
description/busarch/
1284.1-1997_desc.html
El Torito
Bootable CD-ROM
Format Specification
Version 1.0,
January 25, 1995,
Phoenix Technologies Limited
and International Business
Machines Corporation.
support/download/
product+documentation/
platform_system_
software.htm
Front Panel
Front Panel I/O
Connectivity Design
Guide
Version 1.0,
October 2000,
Intel Corporation.
formfactors/
front_panel_io.htm
LPC
Low Pin Count Interface
Specification
Revision 1.0,
September 29, 1997,
Intel Corporation.
design/chipsets/industry/
lpc.htm
OHCI
OpenHCI
Open Host
Controller Interface
Specification for USB
Release 1.0a,
October 10, 1996,
Compaq computer Corp.,
Microsoft Corporation, and
National Semiconductor Corp.
developers/docs.html
PCI
PCI Local Bus
Specification
Revision 2.2,
December 18, 1998,
PCI Special Interest Group.
specifications
PCI Bus Power
Management Interface
Specification
Revision 1.1,
December 18, 1998,
PCI Special Interest Group.
specifications
Plug and
Play
Plug and Play BIOS
Specification
Version 1.0a,
May 5, 1994,
Compaq Computer Corporation,
Phoenix Technologies Limited,
and Intel Corporation.
hwdev/tech/PnP/
default.asp
continued