Intel D845PEBT2 Product Specification - Page 50
Table 15., PCI Interrupt Routing Map
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Intel Desktop Board D845PEBT2 Technical Product Specification Table 15. PCI Interrupt Routing Map PCI Interrupt Source PIRQA AGP connector INTA ICH4 USB UHCI controller 1 INTA SMBus controller ICH4 USB UHCI controller 2 AC '97 ICH4 Audio/Modem ICH4 LAN ICH4 USB UHCI controller 3 ICH4 USB 2.0 EHCI controller PCI bus connector 1 PCI bus connector 2 PCI bus connector 3 INTD PCI bus connector 4 PCI bus connector 5 INTC SATA/SATA RAID or IDE RAID controller IEEE 1394a-2000 controller (optional) PIRQB INTB INTB INTB INTC INTA INTA ICH4 PIRQ Signal Name PIRQC PIRQD PIRQE PIRQF INTB INTC INTA INTA INTB INTB INTA INTD INTC INTD INTA INTB INTC INTA PIRQG INTB INTA INTD PIRQH INTD INTC INTD INTB ✏ NOTE In PIC mode, the ICH4 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6, 7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 14 for the allocation of PIRQ lines to IRQ signals in APIC mode. 50