Intel D845PEBT2 Product Specification - Page 48

Interrupts

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Intel Desktop Board D845PEBT2 Technical Product Specification 2.6 Interrupts The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the Advanced Programmable Interrupt Controller (APIC) portion of the ICH4 component. The PIC is supported in Windows 98 SE and Windows ME, and uses the first 16 interrupts. The APIC is supported in Windows 2000 and Windows XP, and supports a total of 24 interrupts. Table 14. Interrupts IRQ System Resource NMI I/O channel check 0 Reserved, interval timer 1 Reserved, keyboard buffer full 2 Reserved, cascade interrupt from slave PIC 3 COM2 (Note 1) 4 COM1 (Note 1) 5 LPT2 (Plug and Play option)/User available 6 Diskette drive 7 LPT1 (Note 1) 8 Real-time clock 9 Reserved for ICH4 system management bus 10 User available 11 User available 12 Onboard mouse port (if present, else user available) 13 Reserved, math coprocessor 14 15 16 (Note 2) 17 (Note 2) 18 (Note 2) 19 (Note 2) 20 (Note 2) 21 (Note 2) 22 (Note 2) 23 (Note 2) Primary IDE (if present, else user available) Secondary IDE (if present, else user available) USB UHCI controller 1 (through PIRQA) AC '97 audio/modem/User available (through PIRQB) ICH4 USB controller 3 (through PIRQC) ICH4 USB controller 2 (through PIRQD) ICH4 LAN (through PIRQE) User available (through PIRQF) User available (through PIRQG) ICH4 USB 2.0 EHCI controller/User available (through PIRQH) Notes: 1. Default, but can be changed to another IRQ. 2. Available in APIC mode only. 48

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Intel Desktop Board D845PEBT2 Technical Product Specification
48
2.6 Interrupts
The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the
Advanced Programmable Interrupt Controller (APIC) portion of the ICH4 component.
The PIC is
supported in Windows 98 SE and Windows ME, and uses the first 16 interrupts.
The APIC is
supported in Windows 2000 and Windows XP, and supports a total of 24 interrupts.
Table 14.
Interrupts
IRQ
System Resource
NMI
I/O channel check
0
Reserved, interval timer
1
Reserved, keyboard buffer full
2
Reserved, cascade interrupt from slave PIC
3
COM2
(Note 1)
4
COM1
(Note 1)
5
LPT2 (Plug and Play option)/User available
6
Diskette drive
7
LPT1
(Note 1)
8
Real-time clock
9
Reserved for ICH4 system management bus
10
User available
11
User available
12
Onboard mouse port (if present, else user available)
13
Reserved, math coprocessor
14
Primary IDE (if present, else user available)
15
Secondary IDE (if present, else user available)
16
(Note 2)
USB UHCI controller 1 (through PIRQA)
17
(Note 2)
AC
’
97 audio/modem/User available (through PIRQB)
18
(Note 2)
ICH4 USB controller 3 (through PIRQC)
19
(Note 2)
ICH4 USB controller 2 (through PIRQD)
20
(Note 2)
ICH4 LAN (through PIRQE)
21
(Note 2)
User available (through PIRQF)
22
(Note 2)
User available (through PIRQG)
23
(Note 2)
ICH4 USB 2.0 EHCI controller/User available (through PIRQH)
Notes:
1.
Default, but can be changed to another IRQ.
2.
Available in APIC mode only.