Intel D845PEBT2 Product Specification - Page 124

Intel Desktop Board D845PEBT2 Technical Product Specification, Description of POST Operation

Get Intel D845PEBT2 PDF manuals and user guides View all Intel D845PEBT2 manuals
Add to My Manuals
Save this manual to your list of manuals

Page 124 highlights

Intel Desktop Board D845PEBT2 Technical Product Specification Table 92. Runtime Code Uncompressed in F000 Shadow RAM (continued) Code 84 85 86 87 88 89 8B 8C 8D 8F 91 95 96 97 98 99 9A 9B 9C 9D 9E A2 A3 A4 A5 A7 A8 A9 AA AB AC AD Description of POST Operation Lock-key checking over. To check for memory size mismatch with CMOS. Memory size check done. To display soft error and check for password or bypass setup. Password checked. About to do programming before setup. Programming before setup complete. To uncompress SETUP code and execute CMOS setup. Returned from CMOS setup program and screen is cleared. About to do programming after setup. Programming after setup complete. Going to display power-on screen message. First screen message displayed. message displayed. PS/2 Mouse check and extended BIOS data area allocation to be done. Setup options programming after CMOS setup about to start. Going for hard disk controller reset. Hard disk controller reset done. Floppy setup to be done next. Floppy setup complete. Hard disk setup to be done next. Init of different buses optional ROMs from C800 to start. (See Section 5.3 for details of different buses.) Going to do any init before C800 optional ROM control. Any init before C800 optional ROM control is over. Optional ROM check and control will be done next. Optional ROM control is done. About to give control to do any required processing after optional ROM returns control and enable external cache. Any initialization required after optional ROM test over. Going to setup timer data area and printer base address. Return after setting timer and printer base address. Going to set the RS-232 base address. Returned after RS-232 base address. Going to do any initialization before Coprocessor test. Required initialization before Coprocessor is over. Going to initialize the Coprocessor next. Coprocessor initialized. Going to do any initialization after Coprocessor test. Initialization after Coprocessor test is complete. Going to check extended keyboard, keyboard ID and num-lock. Going to display any soft errors. Soft error display complete. Going to set keyboard typematic rate. Keyboard typematic rate set. To program memory wait states. Going to enable parity/NMI. NMI and parity enabled. Going to do any initialization required before giving control to optional ROM at E000. Initialization before E000 ROM control over. E000 ROM to get control next. Returned from E000 ROM control. Going to do any initialization required after E000 optional ROM control. Initialization after E000 optional ROM control is over. Going to display the system configuration. Put INT13 module runtime image to shadow. Generate MP for multiprocessor support (if present). Put CGA INT10 module (if present) in Shadow. continued 124

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
Intel Desktop Board D845PEBT2 Technical Product Specification
124
Table 92.
Runtime Code Uncompressed in F000 Shadow RAM
(continued)
Code
Description of POST Operation
84
Lock-key checking over.
To check for memory size mismatch with CMOS.
85
Memory size check done.
To display soft error and check for password or bypass setup.
86
Password checked.
About to do programming before setup.
87
Programming before setup complete.
To uncompress SETUP code and execute CMOS setup.
88
Returned from CMOS setup program and screen is cleared.
About to do programming after
setup.
89
Programming after setup complete.
Going to display power-on screen message.
8B
First screen message displayed.
<WAIT...> message displayed.
PS/2 Mouse check and
extended BIOS data area allocation to be done.
8C
Setup options programming after CMOS setup about to start.
8D
Going for hard disk controller reset.
8F
Hard disk controller reset done.
Floppy setup to be done next.
91
Floppy setup complete.
Hard disk setup to be done next.
95
Init of different buses optional ROMs from C800 to start.
(See Section 5.3 for details of different
buses.)
96
Going to do any init before C800 optional ROM control.
97
Any init before C800 optional ROM control is over.
Optional ROM check and control will be
done next.
98
Optional ROM control is done.
About to give control to do any required processing after optional
ROM returns control and enable external cache.
99
Any initialization required after optional ROM test over.
Going to setup timer data area and printer
base address.
9A
Return after setting timer and printer base address.
Going to set the RS-232 base address.
9B
Returned after RS-232 base address.
Going to do any initialization before Coprocessor test.
9C
Required initialization before Coprocessor is over.
Going to initialize the Coprocessor next.
9D
Coprocessor initialized.
Going to do any initialization after Coprocessor test.
9E
Initialization after Coprocessor test is complete.
Going to check extended keyboard, keyboard ID
and num-lock.
A2
Going to display any soft errors.
A3
Soft error display complete.
Going to set keyboard typematic rate.
A4
Keyboard typematic rate set.
To program memory wait states.
A5
Going to enable parity/NMI.
A7
NMI and parity enabled.
Going to do any initialization required before giving control to optional
ROM at E000.
A8
Initialization before E000 ROM control over.
E000 ROM to get control next.
A9
Returned from E000 ROM control.
Going to do any initialization required after E000 optional
ROM control.
AA
Initialization after E000 optional ROM control is over.
Going to display the system configuration.
AB
Put INT13 module runtime image to shadow.
AC
Generate MP for multiprocessor support (if present).
AD
Put CGA INT10 module (if present) in Shadow.
continued