Hitachi C4K60 Specifications - Page 138
Initiating an Ultra DMA Write
UPC - 683728199449
View all Hitachi C4K60 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 138 highlights
Figure 8.9 Initiating an Ultra DMA Write DMARQ (device) tUI DMACK(host) STOP (host) tACK tENV DDMARDY(device) tZIORDY tACK tLI tUI HSTROBE (host) DD(15:0) (host) tACK DA0, DA1, DA2, CS0-, CS1- tDZFS tDVS tDVH Note: The definitions for the STOP, DDMARDY and HSTROBE signal lines are not in effect until DMARQ and DMACK are asserted. Mode 0(ns) Mode 1(ns) Mode 2(ns) SYMBOL MIN MAX MIN MAX MIN MAX tDVS 70 48 31 tDVH 6.2 6.2 6.2 tLI tUI tENV tZIORDY 0 150 0 150 0 150 0 0 0 20 70 20 70 20 70 0 0 0 tACK 20 20 20 tDZFS 70 48 31 Mode3(ns) MIN MAX 20 6.2 0 100 0 20 55 0 20 20 Mode4(ns) MIN MAX 6.7 6.2 0 100 0 20 55 0 20 6.7 Mode5(ns) Description MIN MAX 4.8 Data valid setup time at sender 4.8 Data valid hold time at sender 0 75 Limited interlock time 0 Unlimited interlock 20 50 Envelope time 0 Minimum time before driving IORDY 20 Setup and hold times before assertion and negation of DMACK_ 25 Time from data output released-to-driving until the first transition of critical timing K6610170 Rev.2 Dec 22, 2004 - 138 -