Hitachi C4K60 Specifications - Page 33

LBA High Register Cylinder High Register

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7.1.5. LBA Low Register (Sector Number Register) This register in CHS mode contains the starting sector number for any disk data access. This number may be from 1 to the maximum number of sectors per track. In LBA mode and 28-bit addressing, the register contains bits 7-0 of the LBA address. When 48-bit addressing commands are used, the most recently written content contains "LBA bits 7-0", and the previous content contains LBA bits 31-24. The contents of the register are defined otherwise on some commands. These definitions are given in the command descriptions. 7.1.6. LBA Mid Register (Cylinder Low Register) This register in CHS mode contains the lower 8 bits of the starting cylinder address for any disk access. In LBA mode and 28-bit addressing, the register contains bits 15-8 of the LBA address. When 48-bit addressing commands are used, the most recently written content contains "LBA bits 15-8", and the previous content contains LBA bits 39-32. The contents of the register are defined otherwise on some commands. These definitions are given in the command descriptions. 7.1.7. LBA High Register (Cylinder High Register) This register in CHS mode contains the higher 8 bits of the starting cylinder address for any disk access. In LBA mode and 28-bit addressing, the register contains bits 23-16 of the LBA address. When 48-bit addressing commands are used, the most recently written content contains "LBA bits 23-16", and the previous content contains LBA bits 47-40. The contents of the register are defined otherwise on some commands. These definitions are given in the command descriptions. 7.1.8. Device/Head Register This register has the binary coded address of device and head selected. The head numbers begins with "0". Bit 7 6 5 4 3 2 1 0 Name - L - DRV HS3 HS2 HS1 HS0 − Bits HS3 to HS0 are head addresses to be selected. HS3 is the highest bit. The address of the currently selected head is displayed in this register when a command is completed. In case of LBA mode and 28-bit addressing mode, these bits HS3 to HS0 are applied to LBA bits 27 - 24. − DRV is a device selection bit. 0=DEVICE 0, 1=DEVICE 1 − L is the sector address mode select: 0=CHS mode, 1= LBA mode (28-bit addressing or 48-bit addressing) K6610170 Rev.2 Dec 22, 2004 - 33 -

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K6610170
Rev.2
Dec 22, 2004
- 33 -
7.1.5. LBA Low Register (Sector Number Register)
This register in CHS mode contains the starting sector number for any disk data access.
This number may
be from 1 to the maximum number of sectors per track.
In LBA mode and 28-bit addressing, the register
contains bits 7-0 of the LBA address. When 48-bit addressing commands are used, the most recently written
content contains "LBA bits 7-0", and the previous content contains LBA bits 31-24.
The contents of the
register are defined otherwise on some commands.
These definitions are given in the command
descriptions.
7.1.6. LBA Mid Register (Cylinder Low Register)
This register in CHS mode contains the lower 8 bits of the starting cylinder address for any disk access.
In LBA mode and 28-bit addressing, the register contains bits 15-8 of the LBA address. When 48-bit
addressing commands are used, the most recently written content contains "LBA bits 15-8", and the
previous content contains LBA bits 39-32.
The contents of the register are defined otherwise on some
commands.
These definitions are given in the command descriptions.
7.1.7. LBA High Register (Cylinder High Register)
This register in CHS mode contains the higher 8 bits of the starting cylinder address for any disk access.
In LBA mode and 28-bit addressing, the register contains bits 23-16 of the LBA address. When 48-bit
addressing commands are used, the most recently written content contains "LBA bits 23-16", and the
previous content contains LBA bits 47-40. The contents of the register are defined otherwise on some
commands.
These definitions are given in the command descriptions.
7.1.8. Device/Head Register
This register has the binary coded address of device and head selected. The head numbers begins
with "0".
Bit
7
6
5
4
3
2
1
0
Name
-
L
-
DRV
HS3
HS2
HS1
HS0
−
Bits HS3 to HS0 are head addresses to be selected. HS3 is the highest bit. The address of the
currently selected head is displayed in this register when a command is completed. In case of LBA
mode and 28-bit addressing mode, these bits HS3 to HS0 are applied to LBA bits 27 - 24.
−
DRV is a device selection bit. 0=DEVICE 0, 1=DEVICE 1
−
L is the sector address mode select:
0=CHS mode, 1= LBA mode (28-bit addressing or 48-bit addressing)