Acer Aspire 6530G Aspire 6530/6530G Quick Guide - Page 147

Core POST Code Table, Function, Phase, Component - driver

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Core POST Code Table The following table details the core POST codes and functions used in SecureCore. POST Code 0x00 0x01 0x02 0xEE 0xEF 0xnn 0x11 0x22 0x33 0x44 0x88 0x80 0x82 0x84 0x86 0x88 0x8A 0x8C 0x8F 0x90 0xCC 0x20 0x21 0x22 0x23 0x80 0x81 0x82 0x89 0x83 0x84 0x88 0x8A 0x8B 0x8C 0x8D 0x8F 0x90 Function Early Microcode update for CAR Enable CAR CAR Done, initial stack unknown CPU ID to load uCode unknown DT CPU to load uCode File count found in a volume Debug Test driver for debug test PPI 1 (If install debugTest driver) Debug Test driver for debug test PPI 2 (If install debugTest driver) Debug Test driver for debug test PPI 3 (If install debugTest driver) Entry point of loadfile Entry point of apMuLoader A PEIM found PEIM not dispatched yet PEIM satisfies depex Image loaded but fail on security Executing a PEIM Processing notify event for newly installed PPI Handing off to next phase (DXE) Fail to hand off to next phase, system halt All PEIM dispatched! Going to DxeIpl AP Micro-code update S3 resume entry Start running Boot-time bootscripts Start running Run-time bootscripts End of S3 resume, jump back to Waking vector Initialize the chipset Initialize the bridge Initialize the CPU Set Huge Segment Initialize system timer Initialize system I/O Initialize Multi Processor Initialize OEM special code Initialize PIC and DMA Initialize Memory type Initialize Memory size Initialize SMM System memory test Phase CEI / SEC CEI / SEC CEI / SEC CEI / SEC CEI / SEC PEI PEI PEI PEI PEI PEI PEI PEI PEI PEI PEI PEI PEI PEI PEI PEI S3 resume S3 resume S3 resume S3 resume Crisis Recovery Crisis Recovery Crisis Recovery Crisis Recovery Crisis Recovery Crisis Recovery Crisis Recovery Crisis Recovery Crisis Recovery Crisis Recovery Crisis Recovery Crisis Recovery Crisis Recovery Component Core Core Core CPU CPU Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Core Chapter 4 137

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Chapter 4
137
Core POST Code Table
The following table details the core POST codes and functions used in SecureCore.
POST
Code
Function
Phase
Component
0x00
Early Microcode update for CAR
CEI / SEC
Core
0x01
Enable CAR
CEI / SEC
Core
0x02
CAR Done, initial stack
CEI / SEC
Core
0xEE
unknown CPU ID to load uCode
CEI / SEC
CPU
0xEF
unknown DT CPU to load uCode
CEI / SEC
CPU
0xnn
File count found in a volume
PEI
Core
0x11
Debug Test driver for debug test PPI 1 (If install debugTest
driver)
PEI
Core
0x22
Debug Test driver for debug test PPI 2 (If install debugTest
driver)
PEI
Core
0x33
Debug Test driver for debug test PPI 3 (If install debugTest
driver)
PEI
Core
0x44
Entry point of loadfile
PEI
Core
0x88
Entry point of apMuLoader
PEI
Core
0x80
A PEIM found
PEI
Core
0x82
PEIM not dispatched yet
PEI
Core
0x84
PEIM satisfies depex
PEI
Core
0x86
Image loaded but fail on security
PEI
Core
0x88
Executing a PEIM
PEI
Core
0x8A
Processing notify event for newly installed PPI
PEI
Core
0x8C
Handing off to next phase (DXE)
PEI
Core
0x8F
Fail to hand off to next phase, system halt
PEI
Core
0x90
All PEIM dispatched! Going to DxeIpl
PEI
Core
0xCC
AP Micro-code update
PEI
Core
0x20
S3 resume entry
S3 resume
Core
0x21
Start running Boot-time bootscripts
S3 resume
Core
0x22
Start running Run-time bootscripts
S3 resume
Core
0x23
End of S3 resume, jump back to Waking vector
S3 resume
Core
0x80
Initialize the chipset
Crisis Recovery
Core
0x81
Initialize the bridge
Crisis Recovery
Core
0x82
Initialize the CPU
Crisis Recovery
Core
0x89
Set Huge Segment
Crisis Recovery
Core
0x83
Initialize system timer
Crisis Recovery
Core
0x84
Initialize system I/O
Crisis Recovery
Core
0x88
Initialize Multi Processor
Crisis Recovery
Core
0x8A
Initialize OEM special code
Crisis Recovery
Core
0x8B
Initialize PIC and DMA
Crisis Recovery
Core
0x8C
Initialize Memory type
Crisis Recovery
Core
0x8D
Initialize Memory size
Crisis Recovery
Core
0x8F
Initialize SMM
Crisis Recovery
Core
0x90
System memory test
Crisis Recovery
Core