Dell PowerEdge T440 EMC Installation and Service Manual - Page 43

Option, Description, Number of Cores

Page 43 highlights

Option Description However, if power-saving considerations outweigh performance, you might want to reduce the frequency of the processor communication links. If you do this, you should localize memory and I/O accesses to the nearest NUMA node to minimize the impact to system performance. Virtualization Technology Enables or disables the virtualization technology for the processor. This option is set to Enabled by default. Adjacent Cache Line Prefetch Optimizes the system for applications that need high utilization of sequential memory access. This option is set to Enabled by default. You can disable this option for applications that need high utilization of random memory access. Hardware Prefetcher Enables or disables the hardware prefetcher. This option is set to Enabled by default. Software Prefetcher Enables or disables the software prefetcher. This option is set to Enabled by default. DCU Streamer Prefetcher Enables or disables the Data Cache Unit (DCU) streamer prefetcher. This option is set to Enabled by default. DCU IP Prefetcher Enables or disables the Data Cache Unit (DCU) IP prefetcher. This option is set to Enabled by default. Sub NUMA Cluster Sub NUMA Clustering (SNC) is a feature for breaking up the LLC into disjoint clusters based on address range, with each cluster bound to a subset of the memory controllers in the system. It improves average latency to the LLC. Enables or disables the Sub NUMA Cluster. This option is set to Disabled by default. UPI Prefetch Enables you to get the memory that is read started early on DDR bus. The Ultra Path Interconnect (UPI) Rx path will spawn the speculative memory that is read to Integrated Memory Controller (iMC) directly. This option is set to Enabled by default. LLC Prefetch Enables or disables the LLC Prefetch on all threads. This option is set to Disabled by default. Dead Line LLC Alloc Enables or disables the Dead Line LLC Alloc. This option is set to Enabled by default. You can enable this option to enter the dead lines in LLC or disable the option to not enter the dead lines in LLC. Directory AtoS Enables or disables the Directory AtoS. AtoS optimization reduces remote read latencies for repeat read accesses without intervening writes. This option is set to Disabled by default. Logical Processor Idling Enables you to improve the energy efficiency of a system. It uses the operating system core parking algorithm and parks some of the logical processors in the system which in turn allows the corresponding processor cores to transition into a lower power idle state. This option can only be enabled if the operating system supports it. It is set to Disabled by default. Configurable TDP Enables you to configure the TDP level. The available options are Nominal, Level 1, and Level 2. This option is set to Nominal by default. NOTE: This option is only available on certain stock keeping units (SKUs) of the processors. Number of Cores per Processor Processor Core Speed Processor Bus Speed Processor n Controls the number of enabled cores in each processor. This option is set to All by default. Specifies the maximum core frequency of the processor. Displays the bus speed of the processor. NOTE: Depending on the number of processors, there might be up to two processors listed. The following settings are displayed for each processor that is installed in the system: Option Family-ModelStepping Brand Level 2 Cache Level 3 Cache Description Specifies the family, model, and stepping of the processor as defined by Intel. Specifies the brand name. Specifies the total L2 cache. Specifies the total L3 cache. Pre-operating system management applications 43

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Option
Description
However, if power-saving considerations outweigh performance, you might want to reduce the frequency of the
processor communication links. If you do this, you should localize memory and I/O accesses to the nearest NUMA
node to minimize the impact to system performance.
Virtualization
Technology
Enables or disables the virtualization technology for the processor. This option is set to
Enabled
by default.
Adjacent Cache
Line Prefetch
Optimizes the system for applications that need high utilization of sequential memory access. This option is set to
Enabled
by default. You can disable this option for applications that need high utilization of random memory
access.
Hardware
Prefetcher
Enables or disables the hardware prefetcher. This option is set to
Enabled
by default.
Software
Prefetcher
Enables or disables the software prefetcher. This option is set to
Enabled
by default.
DCU Streamer
Prefetcher
Enables or disables the Data Cache Unit (DCU) streamer prefetcher. This option is set to
Enabled
by default.
DCU IP Prefetcher
Enables or disables the Data Cache Unit (DCU) IP prefetcher. This option is set to
Enabled
by default.
Sub NUMA Cluster
Sub NUMA Clustering (SNC) is a feature for breaking up the LLC into disjoint clusters based on address range,
with each cluster bound to a subset of the memory controllers in the system. It improves average latency to the
LLC. Enables or disables the Sub NUMA Cluster. This option is set to
Disabled
by default.
UPI Prefetch
Enables you to get the memory that is read started early on DDR bus. The Ultra Path Interconnect (UPI) Rx path
will spawn the speculative memory that is read to Integrated Memory Controller (iMC) directly. This option is set
to
Enabled
by default.
LLC Prefetch
Enables or disables the LLC Prefetch on all threads. This option is set to
Disabled
by default.
Dead Line LLC
Alloc
Enables or disables the Dead Line LLC Alloc. This option is set to
Enabled
by default. You can enable this option
to enter the dead lines in LLC or disable the option to not enter the dead lines in LLC.
Directory AtoS
Enables or disables the Directory AtoS. AtoS optimization reduces remote read latencies for repeat read accesses
without intervening writes. This option is set to
Disabled
by default.
Logical Processor
Idling
Enables you to improve the energy efficiency of a system. It uses the operating system core parking algorithm and
parks some of the logical processors in the system which in turn allows the corresponding processor cores to
transition into a lower power idle state. This option can only be enabled if the operating system supports it. It is set
to
Disabled
by default.
Configurable TDP
Enables you to configure the TDP level. The available options are
Nominal
,
Level 1
, and
Level 2
. This option is set
to
Nominal
by default.
NOTE:
This option is only available on certain stock keeping units (SKUs) of the processors.
Number of Cores
per Processor
Controls the number of enabled cores in each processor. This option is set to
All
by default.
Processor Core
Speed
Specifies the maximum core frequency of the processor.
Processor Bus
Speed
Displays the bus speed of the processor.
Processor n
NOTE:
Depending on the number of processors, there might be up to two processors listed.
The following settings are displayed for each processor that is installed in the system:
Option
Description
Family-Model-
Stepping
Specifies the family, model, and stepping of the processor as defined by Intel.
Brand
Specifies the brand name.
Level 2 Cache
Specifies the total L2 cache.
Level 3 Cache
Specifies the total L3 cache.
Pre-operating system management applications
43