Hitachi HDS728080PLAT20 Specifications - Page 43
PIO timings
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6.6 PIO timings The PIO cycle timings meet Mode 4 of the ATA/ATAPI-6 description. Table 22: PIO cycle timings chart PARAMETER DESCRIPTION t0 Cycle time t1 Address valid to DIOR-/DIOW- setup t2 DIOR-/DIOW- pulse width t2i DIOR-/DIOW- recovery time t3 DIOW- data setup t4 DIOW- data hold t5 DIOR- data setup t6 DIOR- data hold t9 DIOR-/DIOW- to address valid hold tA IORDY setup width tB IORDY pulse width MIN (ns) 120 25 70 25 20 10 20 5 10 - - MAX (ns 35 1250 6.6.1 Write DRQ interval time For write sectors and write multiple operations 3.8 ms is inserted from the end of negation of the DRQ bit until setting of the next DRQ bit. 6.6.2 Read DRQ interval time For read sectors and read multiple operations the interval from the end of negation of the DRQ bit until setting of the next DRQ bit is as follows: Deskstar 7K80 Hard Disk Drive Specification 39