IBM DTCA-24090 Hard Drive Specifications - Page 51
DMA Timings Multiword
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6.5.2 DMA Timings (Multiword) The Multiword DMA timing meets Mode 2 of the ATA-3 description. 5 DMARQ DMACK HIOR/ HIOW READ DATA WRITE DATA < TL > < T0 > > TI < TD > < TK > < TE> TF < > TJ < > TZ < < TG > TH < PARAMETER DESCRIPTION T0 Cycle time TD HIOR, HIOW pulse width TE HIOR data setup TF HIOR data hold TG HIOW data setup TH HIOW data hold TI DMACK to HIOR/ HIOW setup TJ HIOR/ HIOW to DMACK hold TK HIOR/ HIOW nagated pulse width TL HIOR/ HIOW to DMARQ delay TZ DMACK to tristate Figure 26. D M A (Multi Word) cycle timings MIN MAX Note (nsec) (nsec) 120 70 20 5 20 10 0 5 25 35 25 Electrical Interface Specifications 43
6.5.2
DMA Timings (Multiword)
The Multiword DMA timing meets Mode 2 of the ATA-3 description.
5
DMARQ
< TL >
DMACK
<
T0
>
> TJ <
> TI <
TD
><
TK
>
HIOR/ HIOW
< TE> TF <
> TZ <
READ DATA
<
TG
> TH <
WRITE DATA
PARAMETER DESCRIPTION
MIN
MAX
Note
(nsec) (nsec)
T0
Cycle time
120
TD
HIOR, HIOW pulse width
70
TE
HIOR data setup
20
TF
HIOR data hold
5
TG
HIOW data setup
20
TH
HIOW data hold
10
TI
DMACK to
HIOR/ HIOW setup
0
TJ
HIOR/ HIOW to
DMACK hold
5
TK
HIOR/ HIOW nagated pulse width
25
TL
HIOR/ HIOW to
DMARQ delay
35
TZ
DMACK to tristate
25
Figure 26. DMA (Multi Word) cycle timings
Electrical Interface Specifications
43