IBM DTCA-24090 Hard Drive Specifications - Page 69

Registers

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9.0 Registers Addresses Functions CS0 CS1 DA2 DA1 DA0 READ(DIOR ) WRITE(DIOW ) N N x x x Data bus high imped*1 Not used Control block registers N A 0 x x Data bus high imped Not used N A 1 0 x Data bus high imped Not used N A 1 1 0 Alternate Status Device Control N A 1 1 1 Device Address Not used Command block registers A N 0 0 0 Data Data A N 0 0 1 Error Register Features A N 0 1 0 Sector Count Sector Count A N 0 1 1 Sector Number Sector Number A N 0 1 1 *2 LBA bits 0 7 *2 LBA bits 0 7 A N 1 0 0 Cylinder Low Cylinder Low A N 1 0 0 *2 LBA bits 8 15 *2 LBA bits 8 15 A N 1 0 1 Cylinder High Cylinder High A N 1 0 1 *2 LBA bits 16 23 *2 LBA bits 16 23 A N 1 1 0 Device/Head Device/Head A N 1 1 0 *2 LBA bits 24 27 *2 LBA bits 24 27 A N 1 1 1 Status Command A A x x x Invalid address Invalid address *1 "imped" stands for "impedance". *2 Mapping of registers in LBA mode Logic conventions : A = signal asserted N = signal negated x = does not matter which it is Figure 37. Register Set Communication to or from the device is through an I/O Register that routes the input or output data to or from registers addressed by the signals from the host (CS0-, CS1-, DA2, DA1, DA0, DIOR- and DIOW-). The Command Block Registers are used for sending commands to the device or posting status from the device. The Control Block Registers are used for device control and to post alternate status. © Copyright IBM Corp. 1997 61

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9.0
Registers
Addresses
Functions
CS0
CS1
DA2
DA1
DA0
READ(DIOR )
WRITE(DIOW )
N
N
x
x
x
Data bus high imped*1
Not used
Control block registers
N
A
0
x
x
Data bus high imped
Not used
N
A
1
0
x
Data bus high imped
Not used
N
A
1
1
0
Alternate Status
Device Control
N
A
1
1
1
Device Address
Not used
Command block registers
A
N
0
0
0
Data
Data
A
N
0
0
1
Error Register
Features
A
N
0
1
0
Sector Count
Sector Count
A
N
0
1
1
Sector Number
Sector Number
A
N
0
1
1
*2 LBA bits
0
7
*2 LBA bits
0
7
A
N
1
0
0
Cylinder Low
Cylinder Low
A
N
1
0
0
*2 LBA bits
8 15
*2 LBA bits
8 15
A
N
1
0
1
Cylinder High
Cylinder High
A
N
1
0
1
*2 LBA bits 16 23
*2 LBA bits 16 23
A
N
1
1
0
Device/Head
Device/Head
A
N
1
1
0
*2 LBA bits 24 27
*2 LBA bits 24 27
A
N
1
1
1
Status
Command
A
A
x
x
x
Invalid address
Invalid address
*1 "imped" stands for "impedance".
*2 Mapping of registers in LBA mode
Logic conventions :
A = signal asserted
N = signal negated
x = does not matter which it is
Figure 37. Register Set
Communication to or from the device is through an I/O Register that routes the input or output data to or
from registers addressed by the signals from the host (CS0-, CS1-, DA2, DA1, DA0, DIOR- and DIOW-).
The Command Block Registers are used for sending commands to the device or posting status from the
device.
The Control Block Registers are used for device control and to post alternate status.
Copyright IBM Corp. 1997
61