IBM DTCA-24090 Hard Drive Specifications - Page 70

Alternate Status Register, Command Register, Cylinder High Register, Cylinder Low Register

Page 70 highlights

9.1 Alternate Status Register Alternate Status Register 7 6 5 BSY RDY DF 4 3 2 1 0 DSC DRQ COR IDX ERR Figure 38. Alternate Status Register This register contains the same information as the Status Register. The only difference is that reading this register does not imply interrupt acknowledge or clear a pending interrupt. See 9.13, "Status Register" on page 65 for the definition of the bits in this register. 9.2 Command Register This register contains the command code being sent to the device. Command execution begins immediately after this register is written. The command set is shown in Figure 54 on page 95. All other registers required for the command must be set up before writing the Command Register. 9.3 Cylinder High Register This register contains the high order bits of the starting cylinder address for any disk access. At the end of the command, this register is updated to reflect the current cylinder number. In LBA Mode this register contains Bits 16-23. At the end of the command, this register is updated to reflect the current LBA Bits 16-23. The cylinder number may be from zero to the number of cylinders minus one. 9.4 Cylinder Low Register This register contains the low order 8 bits of the starting cylinder address for any disk access. At the end of the command, this register is updated to reflect the current cylinder number. In LBA Mode this register contains Bits 8-15. At the end of the command, this register is updated to reflect the current LBA Bits 8-15. The cylinder number may be from zero to the number of cylinders minus one. 62 OEM Specifications of DTCA-2xxxx 2.5 inch H D D

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9.1
Alternate Status Register
Alternate Status Register
7
6
5
4
3
2
1
0
BSY
RDY
DF
DSC
DRQ
COR
IDX
ERR
Figure 38. Alternate Status Register
This register contains the same information as the Status Register.
The only difference is that reading this
register does not imply interrupt acknowledge or clear a pending interrupt.
See 9.13, “Status Register” on
page 65 for the definition of the bits in this register.
9.2
Command Register
This register contains the command code being sent to the device. Command execution begins immediately
after this register is written.
The command set is shown in Figure 54 on page 95.
All other registers required for the command must be set up before writing the Command Register.
9.3
Cylinder High Register
This register contains the high order bits of the starting cylinder address for any disk access.
At the end of
the command, this register is updated to reflect the current cylinder number.
In LBA Mode this register contains Bits 16-23. At the end of the command, this register is updated to reflect
the current LBA Bits 16-23.
The cylinder number may be from zero to the number of cylinders minus one.
9.4
Cylinder Low Register
This register contains the low order 8 bits of the starting cylinder address for any disk access.
At the end of
the command, this register is updated to reflect the current cylinder number.
In LBA Mode this register contains Bits 8-15. At the end of the command, this register is updated to reflect
the current LBA Bits 8-15.
The cylinder number may be from zero to the number of cylinders minus one.
62
OEM Specifications of DTCA-2xxxx 2.5 inch HDD