AMD AMD-K6-2/450 Design Guide - Page 18
BIOS Consideration Checklist, CPUID, CPU Speed Detection, ModelSpecific Registers (MSRs)
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Preliminary Information Embedded AMD-K6™ Processors BIOS Design Guide BIOS Consideration Checklist 23913A/0-November 2000 CPUID s Use the CPUID instruction to properly identify the processor. For information on the CPUID instruction, see "CPUID Instruction Overview" on page 57. s Determine the processor model, stepping, and features using functions 0000_0001h and 8000_0001h of the CPUID instruction. s Display the processor name (BIOS boot strings) as described in "CPUID Identification Algorithms" on page 11. CPU Speed Detection s Use speed detection algorithms that do not rely on repetitive instruction sequences. s Use the Time Stamp Counter (TSC) to 'clock' a timed operation and compare the result to the real-time clock (RTC) to determine the operating frequency. See the CPU Speed Determination Program available on the AMD website at http://www.amd.com/products/cpg/bin/. s Display the recommended BIOS boot string as shown in Table 5 on page 11. Model-Specific Registers (MSRs) s Only access MSRs implemented in the processor. s Enable write allocation by programming the Write Handling Control Register (WHCR). See "Write Handling Control Register (WHCR)" on page 19 and page 27, and the Implementation of Write Allocate in the K86™ Processors Application Note, order# 21326 for more information. Note: The WHCR register as defined in models 7 and 8/[7:0] is implemented differently in models 8/[F:8], 9, and D. s For the AMD-K6-2E, AMD-K6-2E+, AMD-K6-III, and AMD-K6-IIIE+ processors, utilize the information provided in the Processor State Observability Register (PSOR) to display the correct processor bus frequency. 6 BIOS Consideration Checklist