AMD AMD-K6-2/450 Design Guide - Page 47
Table 17., Processor-to-Bus Clock Ratios Models 8/[F:8] and 9, State of BF[2:0]
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23913A/0-November 2000 Preliminary Information Embedded AMD-K6™ Processors BIOS Design Guide Table 17. Processor-to-Bus Clock Ratios (Models 8/[F:8] and 9) State of BF[2:0] Processor-Clock to Bus-Clock Ratio 100b 2.5x 101b 3.0x 110b 6.0x1 111b 3.5x 000b 4.5x 001b 5.0x 010b 4.0x 011b 5.5x Notes: 1. The 2.0x ratio that is supported on models 7 and 8/[7:0] is not supported on models 8/[F:8] or 9. Instead, if BF[2:0] equals 110b, a ratio of 6.0x is selected. Table 18. Processor-to-Bus Clock Ratios (Model Standard-Power D) State of BF[2:0] 100b Processor-Clock to Bus-Clock Ratio 2.0x1 101b 3.0x 110b 6.0x 111b 3.5x 000b 4.5x 001b 5.0x 010b 4.0x 011b 5.5x Notes: 1. The 2.5x ratio that is supported on model 8/[F:8] and 9 is not supported on standard-power model D. Instead, if BF[2:0] equals 100b, a ratio of 2.0x is selected. Model 8/[F:8] Registers 35