Epson EPL-N1200 Service Manual - Page 81
E05B27, E05A93, Parallel-B Interface Circuit
View all Epson EPL-N1200 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 81 highlights
Operating Principles EPL-N1200 Service Manual 2.2.1.5 Parallel-B Interface Circuit Figure 2-32 shows the Parallel-B interface circuit block diagram. Data sent from the host computer is latched within the E05A93 by the STROBE signal. The E05A93 outputs the BUSY signal to stop the host computer from sending additional data. The CPU resets the BUSY signal after reading the data from the E05A93, so that the printer is ready to receive more data from the host computer. DATA STROBE BUSY Latch Latch E05A93 (IC11) Figure 2-32. Parallel-B Interface Circuit 2.2.1.6 Parallel-C Interface Circuit Figure 2-33 shows the Parallel-C interface circuit block diagram. The 74ACT1284 is a bi-directional bus driver IC that used to satisfy the data bus length under the IEEE1284 standard. The E05B27(IC43) is used the Parallel-C interface to support, not only standard parallel interface, but also compatibility mode and bi-directional mode (Nibble and ECP) under the IEEE1284 standard. Data 0-7 BUSY /ACK PE SELECT /ERR /STB /SEL IN /AUTO /INIT 74ACT1284 /DIR /DIR PD 0-7 BUSY /ACK PE SELECT /ERR /STB /SEL IN /AUTO /INIT I/ODB0-7 E05B27 (IC43) DB 0-7 AB 0-4 E05A93 (IC11) Figure 2-33. Parallel-C Interface Circuit 2-22 Rev. A