Dell PowerEdge M640 EMC for VRTX enclosure Installation and Service Manual - Page 67

Optimizer Mode, Table 25. Memory operating modes

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Table 25. Memory operating modes Memory Operating Mode Optimizer Mode Mirror Mode Single Rank Spare Mode Multi Rank Spare Mode Dell Fault Resilient Mode Description The Optimizer Mode if enabled, the DRAM controllers operate independently in the 64-bit mode and provide optimized memory performance. The Mirror Mode if enabled, the system maintains two identical copies of data in memory, and the total available system memory is one half of the total installed physical memory. Half of the installed memory is used to mirror the active memory modules. This feature provides maximum reliability and enables the system to continue running even during a catastrophic memory failure by switching over to the mirrored copy. The installation guidelines to enable Mirror Mode require that the memory modules be identical in size, speed, and technology, and they must be populated in sets of 6 per processor. Single Rank Spare Mode allocates one rank per channel as a spare. If excessive correctable errors occur in a rank or channel, while the operating system is running, they are moved to the spare area to prevent errors from causing an uncorrectable failure. Requires two or more ranks to be populated in each channel. Multi Rank Spare Mode allocates two ranks per channel as a spare. If excessive correctable errors occur in a rank or channel, while the operating system is running, they are moved to the spare area to prevent errors from causing an uncorrectable failure. Requires three or more ranks to be populated in each channel. With single rank memory sparing enabled, the system memory available to the operating system is reduced by one rank per channel. For example, in a dual-processor configuration with sixteen 16 GB single-rank memory modules, the available system memory is: 3/4 (ranks/channel) × 16 (memory modules) × 16 GB = 192 GB, and not 16 (memory modules) × 16 GB = 256 GB. For multi rank sparing, the multiplier changes to 1/2 (ranks/channel). NOTE: To use memory sparing, this feature must be enabled in the BIOS menu of System Setup. NOTE: Memory sparing does not offer protection against a multi-bit uncorrectable error. The Dell Fault Resilient Mode if enabled, the BIOS creates an area of memory that is fault resilient. This mode can be used by an OS that supports the feature to load critical applications or enables the OS kernel to maximize system availability. Optimizer Mode This mode supports Single Device Data Correction (SDDC) only for memory modules that use x4 device width. It does not impose any specific slot population requirements. • Dual processor: Populate the slots in round robin sequence starting with processor 1. NOTE: Processor 1 and processor 2 population should match. Table 26. Memory population rules Processor Configuration Single processor Optimizer (Independent channel) population order Memory population 1, 2, 3, 4, 5, 6, 7, 8 Memory population information Odd amount of DIMMs per processor allowed. Installing and removing system components 67

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Table 25. Memory operating modes
Memory Operating Mode
Description
Optimizer Mode
The
Optimizer Mode
if enabled, the DRAM controllers operate
independently in the 64-bit mode and provide optimized memory
performance.
Mirror Mode
The
Mirror Mode
if enabled, the system maintains two identical
copies of data in memory, and the total available system memory is
one half of the total installed physical memory. Half of the installed
memory is used to mirror the active memory modules. This feature
provides maximum reliability and enables the system to continue
running even during a catastrophic memory failure by switching
over to the mirrored copy. The installation guidelines to enable
Mirror Mode require that the memory modules be identical in size,
speed, and technology, and they must be populated in sets of 6 per
processor.
Single Rank Spare Mode
Single Rank Spare Mode
allocates one rank per channel as a
spare. If excessive correctable errors occur in a rank or channel,
while the operating system is running, they are moved to the spare
area to prevent errors from causing an uncorrectable failure.
Requires two or more ranks to be populated in each channel.
Multi Rank Spare Mode
Multi Rank Spare Mode
allocates two ranks per channel as a
spare. If excessive correctable errors occur in a rank or channel,
while the operating system is running, they are moved to the spare
area to prevent errors from causing an uncorrectable failure.
Requires three or more ranks to be populated in each channel.
With single rank memory sparing enabled, the system memory
available to the operating system is reduced by one rank per
channel.
For example, in a dual-processor configuration with sixteen 16 GB
single-rank memory modules, the available system memory is: 3/4
(ranks/channel) × 16 (memory modules) × 16 GB = 192 GB, and
not 16 (memory modules) × 16 GB = 256 GB. For multi rank
sparing, the multiplier changes to 1/2 (ranks/channel).
NOTE:
To use memory sparing, this feature must be
enabled in the BIOS menu of System Setup.
NOTE:
Memory sparing does not offer protection
against a multi-bit uncorrectable error.
Dell Fault Resilient Mode
The
Dell Fault Resilient Mode
if enabled, the BIOS creates an
area of memory that is fault resilient. This mode can be used by an
OS that supports the feature to load critical applications or enables
the OS kernel to maximize system availability.
Optimizer Mode
This mode supports Single Device Data Correction (SDDC) only for memory modules that use x4 device width. It does not impose any
specific slot population requirements.
•
Dual processor: Populate the slots in round robin sequence starting with processor 1.
NOTE:
Processor 1 and processor 2 population should match.
Table 26. Memory population rules
Processor
Configuration
Memory population
Memory population information
Single processor
Optimizer (Independent channel)
population order
1, 2, 3, 4, 5, 6, 7, 8
Odd amount of DIMMs per processor
allowed.
Installing and removing system components
67