Intel P8700 Data Sheet - Page 39
Notes
UPC - 735858206174
View all Intel P8700 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 39 highlights
Electrical Specifications Table 10. Voltage and Current Specifications for the Dual-Core, Low-Voltage SFF Processor Symbol Parameter Min Typ Max Unit Notes ICC Deep Sleep IDSLP HFM - SuperLFM IDPRSLP ICC Deeper Sleep - IDC4 ICC Intel Enhanced Deeper Sleep - IDPWDN ICC Deep Power Down Technology State (C6) - dICC/DT VCC Power Supply Current Slew Rate at Processor Package Pin - ICCA ICC for VCCA Supply - ICCP ICC for VCCP Supply before VCC Stable ICC for VCCP Supply after VCC Stable - - 10.5 A 3, 4, 12 7.5 - 6.5 A 3, 4 - 5.6 A 3, 4 - 3.2 A 3, 4 - 600 mA/µs 7, 9 - 130 mA 4.5 A 10 - 2.5 A 11 NOTES: 1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing such that two processors at the same frequency may have different settings within the VID range. Note that this differs from the VID employed by the processor during a power management event (Intel Thermal Monitor 2, Enhanced Intel SpeedStep Technology, or Enhanced Halt State). 2. The voltage specifications are assumed to be measured across VCC_SENSE and VSS_SENSE pins at socket with a 100-MHz bandwidth oscilloscope, 1.5-pF maximum probe capacitance, and 1-MΩ minimum impedance. The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled in the scope probe. 3. Specified at 105 °C TJ. 4. Specified at the nominal VCC. 5. Measured at the bulk capacitors on the motherboard. 6. VCC,BOOT tolerance shown in Figure 7 and Figure 8. 7. Based on simulations and averaged over the duration of any change in current. Specified by design/ characterization at nominal VCC. Not 100% tested. 8. This is a power-up peak current specification that is applicable when VCCP is high and VCC_CORE is low. 9. This is a steady-state ICC current specification that is applicable when both VCCP and VCC_CORE are high. 10. Processor ICC requirements in Intel Dynamic Acceleration Technology mode are lesser than ICC in HFM 11. The maximum delta between Intel Enhanced Deeper Sleep and LFM on the processor will be lesser than or equal to 300 mV. 12. Instantaneous current ICC_CORE_INST of 36 A has to be sustained for short time (tINST) of 35 µs. Average current will be less than maximum specified ICCDES. VR OCP threshold should be high enough to support current levels described herein. Datasheet 39