Intel P8700 Data Sheet - Page 59

Package Mechanical Specifications and Pin Information 4.2 Processor Pinout and Pin List Figure 16 and Figure 17 show the processor (SV and XE) pinout as viewed from the top of the package. Table 16 provides the pin list, arranged numerically by pin number. Figure 16 through Figure 18 show the top view of the LV and ULV processor package. Table 18 lists the SFF processor ballout alphabetically by signal name. For signal descriptions, refer to Section 4.3. Figure 16. Processor Pinout (Top Package View, Left Side) 1 A1 B1 C RESET# D VSS E DBSY# F BR0# 2 VSS RSVD VSS RSVD BNR# VSS 3 4 5 6 7 SMI# VSS FERR# A20M# VCC INIT# TEST7 RSVD VSS RS[0]# LINT1 IGNNE # VSS HITM# RS[1]# DPSLP# VSS STPCLK # DPRSTP # VSS VSS LINT0 PWRGO OD VSS RSVD VCC THERM TRIP# SLP# VCC VCC G VSS TRDY# RS[2]# VSS BPRI# H ADS# REQ[1] # VSS LOCK# DEFER# J A[9]# VSS REQ[3] # A[3]# VSS K VSS REQ[2] REQ[0] # # VSS A[6]# L REQ[4]# A[13]# VSS A[5]# A[4]# M ADSTB[0] # VSS A[7]# RSVD VSS N VSS A[8]# A[10]# VSS RSVD HIT# VSS VCCP VCCP VSS VCCP VCCP P A[15]# A[12]# VSS A[14]# A[11]# VSS R A[16]# VSS A[19]# A[24]# VSS VCCP T VSS RSVD A[26]# VSS A[25]# VCCP U A[23]# A[30]# VSS A[21]# V ADSTB[1] # VSS RSVD A[31]# W VSS A[27]# A[32]# VSS A[18]# VSS A[28]# VSS VCCP A[20]# Y COMP[3] A[17]# VSS A[29]# A[22]# VSS AA COMP[2] VSS A[35]# A[33]# VSS TDI VCC 8 VSS VSS VSS VSS VSS VSS VSS AB VSS A[34]# TDO VSS TMS TRST# VCC AC PREQ# AD BPM[2]# PRDY# VSS VSS BPM[1] # BPM[3] # BPM[0] # AE VSS VID[6] VID[4] VSS AF TEST5 1 VSS 2 VID[5] VID[3] 3 4 TCK VSS VID[2] VID[1] 5 VSS VCC VID[0] VCC PSI# VSS 6 VSS SENSE VCC SENSE 7 VSS VSS VSS VSS VSS 8 9 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC 9 10 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC 10 11 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 11 12 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC 12 13 VCC A VSS B VCC C VSS D VCC E VSS F G H J K L M N P R T U V W Y VCC A A VSS A B VCC A C VSS A D VCC A E VSS A F 13 NOTES: 1. Keying option for Micro-FCPGA, A1 and B1 are de-populated. 2. Keying option for Micro-FCBGA, A1 is de-populated and B1 is VSS. Datasheet 59