Intel P8700 Data Sheet - Page 49

Table 14., CMOS Signal Group DC Specifications - drivers

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Electrical Specifications Table 14. CMOS Signal Group DC Specifications Symbol Parameter Min VCCP VIL VIH VOL VOH IOL IOH ILI Cpad1 Cpad2 I/O Voltage Input Low Voltage CMOS Input High Voltage Output Low Voltage Output High Voltage Output Low Current Output High Current Input Leakage Current Pad Capacitance Pad Capacitance for CMOS Input 1.00 -0.10 0.7*VCCP -0.10 0.9*VCCP 1.5 1.5 - 1.80 0.95 Typ 1.05 0.00 VCCP 0 VCCP - - - 2.30 1.2 Max 1.10 0.3*VCCP VCCP+0.1 0.1*VCCP VCCP+0.1 4.1 4.1 ±100 2.75 1.45 Unit V V V V V mA mA µA pF pF Notes1 2 2 2 2 3 4 5 6 7 NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. The VCCP referred to in these specifications refers to instantaneous VCCP. 3. Measured at 0.1 *VCCP. 4. Measured at 0.9 *VCCP. 5. For Vin between 0 V and VCCP. Measured when the driver is tristated. 6. Cpad1 includes die capacitance only for DPRSTP#, DPSLP#, PWRGOOD. No package parasitics are included. 7. Cpad2 includes die capacitance for all other CMOS input signals. No package parasitics are included. Table 15. Open Drain Signal Group DC Specifications Symbol Parameter Min Typ VOH VOL IOL ILO Cpad Output High Voltage Output Low Voltage Output Low Current Output Leakage Current Pad Capacitance VCCP-5% 0 16 - 1.80 VCCP - - - 2.30 Max VCCP+5% 0.20 50 ±200 2.75 Unit V V mA µA pF NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. Measured at 0.2 V. 3. VOH is determined by value of the external pull-up resistor to VCCP. 4. For Vin between 0 V and VOH. 5. Cpad includes die capacitance only. No package parasitics are included. § Notes1 3 2 4 5 Datasheet 49

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Datasheet
49
Electrical Specifications
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
The V
CCP
referred to in these specifications refers to instantaneous V
CCP
.
3.
Measured at 0.1 *V
CCP
.
4.
Measured at 0.9 *V
CCP
.
5.
For Vin between 0 V and V
CCP
. Measured when the driver is tristated.
6.
Cpad1 includes die capacitance only for DPRSTP#, DPSLP#, PWRGOOD. No package parasitics are
included.
7.
Cpad2 includes die capacitance for all other CMOS input signals. No package parasitics are included.
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
Measured at 0.2 V.
3.
V
OH
is determined by value of the external pull-up resistor to V
CCP
.
4.
For Vin between 0 V and V
OH
.
5.
Cpad includes die capacitance only. No package parasitics are included.
§
Table 14.
CMOS Signal Group DC Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Notes
1
V
CCP
I/O Voltage
1.00
1.05
1.10
V
V
IL
Input Low Voltage CMOS
-0.10
0.00
0.3*V
CCP
V
2
V
IH
Input High Voltage
0.7*V
CCP
V
CCP
V
CCP
+0.1
V
2
V
OL
Output Low Voltage
-0.10
0
0.1*V
CCP
V
2
V
OH
Output High Voltage
0.9*V
CCP
V
CCP
V
CCP
+0.1
V
2
I
OL
Output Low Current
1.5
—
4.1
mA
3
I
OH
Output High Current
1.5
—
4.1
mA
4
I
LI
Input Leakage Current
—
—
±100
μA
5
Cpad1
Pad Capacitance
1.80
2.30
2.75
pF
6
Cpad2
Pad Capacitance for CMOS Input
0.95
1.2
1.45
pF
7
Table 15.
Open Drain Signal Group DC Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Notes
1
V
OH
Output High Voltage
V
CCP
–5%
V
CCP
V
CCP
+5%
V
3
V
OL
Output Low Voltage
0
—
0.20
V
I
OL
Output Low Current
16
—
50
mA
2
I
LO
Output Leakage Current
—
—
±200
μA
4
Cpad
Pad Capacitance
1.80
2.30
2.75
pF
5